Specifications

EISA and ISA Bus Support
14.2 Intel 82350DT EISA Chipset
14.2 Intel 82350DT EISA Chipset
INTEL offers a chip set which is designed to provide an interface between a
CPU and the EISA Bus. This chipset provides a 15 level Interrupt Controller(2
logical 8259 chips cascaded), a 7 channel DMA controller(2 logical 8237 chips
cascaded), timers, buffers, and logic to convert the 8 and 16 bit ISA protocols
to the 32 bit EISA protocol. There is also a chip designed for use by adapter
boards to interface to the EISA bus. The INTEL 82355 Bus Master Interface
chip is intended for use by adapters wishing to talk EISA protocol, and works in
conjunction with the 82350 chip set. Documentation that describes this chip set
is available from INTEL.
14.3 EISA Bus Resources
The EISA bus has a limited set of system resources. Each adapter is designed to
use some subset of the available EISA resources:
• Interrupt Request Levels (IRQ’s)
• DMA Channel
• I/O Port Addresses
• EISA Memory space addresses
Due to the limited number of these resources, the large supply of E/ISA
adapter vendors, and the need to plug up to 15 adapters into the EISA bus, the
configuration of EISA based machines is a very complicated task. Configuration
of the system refers to the assignment of resources in a conflict free manner,
allowing all adapters to work properly. Adapters are typically designed to use
a subset of each of the resource types. The assignment of these resources to
adapters is done by an EISA Configuration Utility (ECU) which is run before
booting the machine.
The following sections quickly describe each of these resources and provide a
description of the ECU.
14.3.1 IRQs
Each EISA slot connector has 15 pins dedicated to the IRQ levels, assuring each
card that it can use any of the available IRQ levels. These wires are routed to
the Interrupt Controller chip which performs priority resolution, and notification
of the CPU. See below for a more detailed description of the interrupt flow. EISA
cards typically have a software programmable register that the driver must set
up to inform the hardware which IRQ line to drive. ISA cards typically have
jumpers on the board which must be set up to tell the hardware which IRQ line
to use. The assignment of an IRQ level to a board is done by the Configuration
Utility, discussed below.
14.3.2 DMA Channel
For boards that do not have the Bus Master capability (ie, are not complex
enough to take control of the EISA bus) the 82350 chip set provides seven DMA
channels. The driver must set up the registers in the 82357 chip (base address,
count, etc.) corresponding to the assigned DMA channel. See the section below on
DMA for a more detailed description. The ECU is responsible for assigning the
DMA channels to the boards that require them.
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