Specifications

EISA and ISA Bus Support
14.7 EISA Bus Support on DEC 2000
Addr Addr Access type Byte length
bits bits Enables constant
8:7 6:5
00 00 byte access to f f f T 000
00 01 word access to f f T T 020
word 0
00 10 tribyte access to f T T T 040
00 11 longword access to T T T T 060
LW 0
01 00 byte access to f f T f 080
byte 1
01 01 word access to f T T f 0A0
01 10 tribyte access to T T T f 0C0
tribyte 1
01 11 reserved
10 00 byte access to f T f f 100
byte 2
10 01 word access to T T f f 120
10 10 reserved
10 11 reserved
11 00 byte access to T f f f 180
byte 3
11 01 reserved
11 10 reserved
11 11 reserved
14.7.3 Register Access
Register access on the DEC 2000 is done with the direct access method or using
the device register access routines described in Appendix A. There is no mailbox
hardware on DEC 2000 systems. However, to make the interface easier for the
driver writer, the CRAM routines are provided, and simply perform direct access
of registers, as opposed to a mailbox access. Usage of these routines is highly
recommended, as the EISA bus will be found on newer platforms, and uses
different shift amounts than DEC 2000. If the driver uses the CRAM routines
for register access, there is one less thing that may need to change to move the
driver between EISA platforms.
14.7.3.1 Direct Register Access
Daring authors are certainly able to do the direct access of registers without
using CRAMs. Be sure to pay strict attention to the setting of the length/offset
bits <8:5>, and be sure to understand the address bit shifting that is occuring
over the various buses in the DEC 2000. In the case of an EISA bus access, the
cycle time of the EISA bus is so slow relative to the EV4, that the overhead of a
routine call for the CRAM routines is negligible.
14.7.3.2 CRAM Register Access
CRAM register access on the DEC 2000 works similarly to the other AXP
machines. The same CRAM routine interface (IOC$CRAM_INIT, IOC$CRAM_
CMD, IOC$CRAM_IO, and others) is provided, and it works in the same fashion.
Obviously there is quite a lot of bit shifting going on behind the scenes of the
routine calls. Be sure to byte lane the data in the CRAM RDATA and WDATA
quadwords before using. Note that this is not true Hardware Mailbox access, as
defined in the SRM. The DEC 2000 has no mailbox hardware, the CRAM routines
use direct access methods. That is, the actual access is performed using a load or
store instruction to a virtual address.
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