Specifications

EISA and ISA Bus Support
14.7 EISA Bus Support on DEC 2000
Note that some of this setup is required for each transfer.
14.7.5 I/O Interrupts on DEC 2000
An earlier section described the general flow of an E/ISA device interrupt. This
section describes the OpenVMS AXP view in more detail. It is assumed that the
reader has read the previous section on EISA interrupts.
14.7.5.1 EISA IRQs
There are 15 IRQ levels available on DEC 2000. Each E/ISA device reports its
interrupts through one of these IRQ levels. The default set-up for the IRQ’s is
to be edge-triggered. The ECU/console is responsible for assignment of the IRQ
level to a board. The assignment of the IRQ levels depends on the order boards
are plugged into the EISA slots. One IRQ level can be given to one of a subset of
boards; that is, many boards are designed to use each particular IRQ. The first
board encountered during resource assignment (board in the earliest EISA slot)
will be given the IRQ. The others boards that may use that IRQ are assigned
another available IRQ.
Currently, the console assigns the IRQ’s as follows:
IRQ0—82357 Timer Interrupt
IRQ1—Combo chip Parallel Port Interrupt
IRQ2—Not a valid interrupt, used to cascade the slave 8259 IRQ’s into the
master 8259
IRQ3—Not assigned to any device
IRQ4—Not assigned to any device
IRQ5—Assigned to the first DE422 board encountered in system
IRQ6—Not assigned by console, given to the Floppy by Bus Support Code
IRQ7—Not assigned, this is the spurious interrupt IRQ level, see 82357 spec
for details
IRQ8—Not a valid interrupt, it is asserted low, and not used on DEC 2000
IRQ9—Compaq VGA card uses IRQ9, DEFEA card can also use IRQ9
IRQ10—Second DE422 is assigned this IRQ
IRQ11—First DEFEA card found is assigned this IRQ
IRQ12—First Adaptech SCSI board found is assigned this IRQ
IRQ13—Not assigned to any device, used for Buffer Chaining by DMA engine
IRQ14—Assigned to the second Adaptech SCSI board found
IRQ15—Assigned to the second DEFEA card found in the system
Note that the COM ports on the COMBO chip do not report via an EISA IRQ.
They are wired directly to an Interrupt Request Level on the EV4 chip.
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