Specifications

Futurebus+ Bus Support
15.5 Futurebus+ Register Access
15.5 Futurebus+ Register Access
On both the DEC 10000/7000 and DEC 4000 platforms, access to Futurebus+
CSR space is accomplished through hardware I/O mailboxes or the device register
access routines described in Appendix A. A driver uses the standard register
access routines provided by OpenVMS/AXP to accomplish a register access.
15.5.1 Allocating CRAMs for Futurebus+ Register Access
There is nothing that is specific to Futurebus+ in the area of CRAM allocation.
As mentioned previously, CRAM allocation can be done automatically by
the driver loading program by specifying the desired number of CRAMs in
DPT$W_IDB_CRAMS or DPT$W_UCB_CRAMS, or the driver can directly call
IOC$ALLOCATE_CRAM.
15.5.2 Initializing CRAMS
As with all mailbox register accesses, IOC$CRAM_CMD is used to initialize the
COMMAND, MASK, and RBADR fields of the CRAM. The initialization of these
fields is done in a bus-specific manner. For the Futurebus+, the COMMAND field
is initialized (based on the command index) with bit patterns that are directly
driven onto the Futurebus+ CM<7:0> wires during a Futurebus+ command
cycle. The MASK bits become Futurebus+ byte enable signals at the appropriate
time during a Futurebus+ cycle. The RBADR field is initialized with the target
address of the Futurebus+ CSR. The following table shows which command
indices are supported on Futurebus+, and the COMMAND field bit patterns that
are generated for each command index.
Command Index Mailbox Command Description
Field Contents
(bits 7:0)
cramcmd$k_rdquad3 0 0 1 0 0 0 read, unlocked, aw=32,
0 0 dw=64
cramcmd$k_rdlong3 0 0 0 0 0 0 read, unlocked, aw=32,
cramcmd$k_rdword3 0 0 0 0 0 0 read, partial, aw=32,
1 0 dw=32
cramcmd$k_rdbyte3 0 0 0 0 0 0 read, partial, aw=32,
cramcmd$k_wtquad3 0 0 1 1 0 0 write, unlocked,
0 0 aw=32, dw=64
cramcmd$k_wtlong3 0 0 0 1 0 0 write, unlocked,
cramcmd$k_wtword3 0 0 0 1 0 0 write, partial, aw=32,
1 0 dw=32
cramcmd$k_wtbyte3 0 0 0 1 0 0 write, partial, aw=32,
cramcmd$k_rdquad6 1 0 1 0 0 0 read, unlocked, aw=64,
0 0 dw=64
cramcmd$k_rdlong6 1 0 0 0 0 0 read, unlocked, aw=64,
cramcmd$k_rdword6 1 0 0 0 0 0 read, partial, aw=64,
1 0 dw=32
cramcmd$k_rdbyte6 1 0 0 0 0 0 read, partial, aw=64,
cramcmd$k_wtquad6 1 0 1 1 0 0 write, unlocked,
0 0 aw=64, dw=64
cramcmd$k_wtlong6 1 0 0 1 0 0 write, unlocked,
0 0 aw=64, dw=32
cramcmd$k_wtword6 1 0 0 1 0 0 write, partial, aw=64,
cramcmd$k_wtbyte6 1 0 0 1 0 0 write, partial, aw=64,
1 0 dw=32
15–5