Specifications

Futurebus+ Bus Support
15.10 Futurebus+ Bus Probing During Booting
a driver from vendor Y–the spec_id identifies the manufacturer that supplies
the driver (vendor Y, in this example). If a spec_id is found, INI$IOMAP uses it
rather than the vendor_id to identify the board manufacturer. INI$IOMAP also
searches the node ROM space for one of MODULE_SW_VERSION, NODE_SW_
VERSION, or UNIT_SW_VERSION (again, the Futurebus+ specifications claim
that only one of these locations should be present in the ROM). The sw_version
identifies the driver required to support the Futurebus+ adapter.
INI$IOMAP concatenates the vendor_id and sw_version to form a 64 bit identifier,
and stores it in the BUSARRAY$Q_HW_ID field in the corresponding bus array
entry. This 64 bit identifier uniquely identifies a Futurebus+ adapter. It is used
by Digital bus configuration routines to associate an adapter and driver. The bus
specific fields of a Futurebus+ node bus array entry are initialized as follows:
• BUSARRAY$Q_HW_ID—the concatenation of the vendor_id and sw_version
is stored in this field.
• BUSARRAY$Q_CSR—the base of Futurebus+ Initial Node Space is stored in
this field.
• BUSARRAY$L_NODE_NUMBER—the Futurebus+ node number is stored in
this field.
The information in the Futurebus+ bus array is displayed by the SYSMAN IO
SHOW BUS command, and is useful for manual CONNECTion of devices.
15.11 Futurebus+ on DEC 4000
This section explains some of the details of the DEC 4000 Futurebus+
implementation. More information can be found in the DEC 4000 System
Specifications.
15.11.1 The DEC 4000 Futurebus+ Bridge
The DEC 4000 I/O Module implements a Local I/O subsystem and a Futurebus+
bridge. The Futurebus+ bridge portion of the I/O module occupies Futurebus
backplane slot 0. Backplane slots 1-6 are available for user Futurebus+ options.
As a Futurebus+ master, the I/O module is capable of generating transactions
using A32 or A64 address width and D32 or D64 data width.
As a Futurebus+ slave, the I/O module only responds to A32 address width
transactions. It does not support A64 addressing as a Futurebus+ slave.
15.11.2 DEC 4000 Futurebus+ Address Space
The DEC 4000 Futurebus+ bridge maps Futurebus+ A32 address space to DEC
4000 system memory space as shown in Figure 15–8.
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