Specifications

OpenVMS System Routines Called by OpenVMS AXP Device Drivers
IOC$CRAM_IO
SS$_TIMEOUT Mailbox operation did not complete in mailbox
transaction timeout interval.
Description
IOC$CRAM_IO performs an entire hardware I/O mailbox transaction from
the queuing of the hardware I/O mailbox to the MBPR to the transaction’s
completion. A call to IOC$CRAM_IO is the equivalent of independent calls to
IOC$CRAM_QUEUE and IOC$CRAM_WAIT. Prior to calling IOC$CRAM_IO, a
driver typically calls IOC$CRAM_CMD to insert a command, mask, and remote
interconnect address into the hardware I/O mailbox portion of the CRAM. For
CRAMs involved in writes to device interface registers, the driver must also
insert the data to be written into CRAM$Q_WDATA,
IOC$CRAM_IO initiates an I/O operation to a device in remote I/O space by
writing the physical address of the hardware I/O mailbox portion of a CRAM to
the MBPR. If it is not able to post the mailbox to the MBPR in the MBPR queue
timeout interval (CRAM$Q_QUEUE_TIME), it returns SS$_INTERLOCK status
to its caller.
If it does successfully queue the mailbox, it sets the CRAM$V_IN_USE bit in
CRAM$B_CRAM_FLAGS and repeatedly checks the done bit in the hardware I/O
mailbox (CRAM$V_MBX_DONE in CRAM$W_MBX_FLAGS):
• If the done bit is not set in the mailbox transaction timeout interval
(CRAM$Q_WAIT_TIME), IOC$CRAM_IO leaves the CRAM$V_IN_USE
bit in CRAM$B_CRAM_FLAGS set and returns SS$_TIMEOUT status to its
caller.
• If the done bit is set, but the error bit in the mailbox (CRAM$V_MBX_ERROR
in CRAM$W_MBX_FLAGS) is also set, IOC$CRAM_IO clears CRAM$V_IN_
USE and returns SS$_CTRLERR status to its caller. Note that, if the disable-
error bit (CRAM$V_DER) is set, IOC$CRAM_IO never returns an error
(although it may request an IOMBXERR fatal bugcheck in the event of an
error).
• If the done bit is set and the error bit is clear, IOC$CRAM_IO clears
CRAM$V_IN_USE and returns SS$_NORMAL status to its caller. If
IOC$CRAM_IO returns SS$_NORMAL status for read mailbox operations,
the requested data has been returned to CRAM$Q_RDATA. A return of SS$_
NORMAL status for mailbox write operations does not necessarily guarantee
that the data placed in CRAM$Q_WDATA has been successfully written to
the device register.
A–18