VAX 7000 Pocket Service Guide Order Number EK–7000A–PG.001 This manual is intended for Digital service engineers. It supplies easy-toaccess key information on VAX 7000 systems.
First Printing, September 1992 The information in this document is subject to change without notice and should not be construed as a commitment by Digital Equipment Corporation. Digital Equipment Corporation assumes no responsibility for any errors that may appear in this document. The software, if any, described in this document is furnished under a license and may be used or copied only in accordance with the terms of such license.
Contents Preface ...................................................................................................... xi Chapter 1 Registers 1.1 1.2 1.3 1.4 KA7AA Registers ................................................................... 1-2 MS7AA Registers ................................................................. 1-27 I/O Port Registers ................................................................. 1-35 DWLMA Registers ...............................................................
Chapter 4 Diagnostics 4.1 4.2 4.3 Test Command ....................................................................... 4-2 Set Host Command — Running DUP-Based Diagnostics and Utilities .......................................................................... 4-10 Set Host Command — Running Diagnostics on a Remote XMI Adapter ........................................................................ 4-12 Chapter 5 FRU Locations 5.1 5.2 5.3 5.4 5.5 FRUs Common to Every Platform ............................
8.4 8.5 8.6 Soft Error Parse Tree ........................................................... 8-20 I/O Port Parse Tree .............................................................. 8-21 DWLMA Parse Tree ............................................................. 8-23 Examples 2-1 3-1 3-2 3-3 3-4 3-5 3-6 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 4-9 4-10 7-1 7-2 7-3 7-4 7-5 7-6 7-7 7-8 Examining the Device Register of VAXBI Node 7 ............... 2-7 Boot Command — Booting from an InfoServer ..................
1-3 1-4 1-5 1-6 1-7 1-8 1-9 1-10 1-11 1-12 1-13 1-14 1-15 1-16 1-17 1-18 1-19 1-20 1-21 1-22 1-23 1-24 1-25 1-26 1-27 1-28 1-29 1-30 1-31 1-32 1-33 1-34 1-35 1-36 1-37 1-38 1-39 1-40 1-41 1-42 1-43 1-44 1-45 vi LCNR — Configuration Register .......................................... 1-4 LMMR0–7 — Memory Mapping Registers ........................... 1-4 LBESR0–3 — Bus Error Syndrome Registers ..................... 1-4 LBECR0–1 — Bus Error Command Registers .....................
1-46 1-47 1-48 1-49 1-50 1-51 1-52 1-53 1-54 1-55 1-56 1-57 1-58 1-59 1-60 1-61 1-62 1-63 1-64 1-65 1-66 1-67 1-68 1-69 1-70 1-71 1-72 1-73 1-74 1-75 1-76 1-77 1-78 1-79 1-80 1-81 1-82 1-83 1-84 1-85 1-86 PAMODE — Physical Address Mode Register ................... 1-22 MMEADR — Memory Management Exception Address Register ................................................................................. 1-23 MMEPTE — Memory Management Exception PTE Address Register ..........................................
1-87 1-88 1-89 1-90 1-91 1-92 1-93 1-94 2-1 2-2 2-3 5-1 5-2 5-3 5-4 5-5 5-6 6-1 6-2 6-3 6-4 6-5 6-6 6-7 6-8 6-9 6-10 8-1 8-2 8-3 8-4 8-5 8-6 IPR1 — Interrupt Pending Register 1 ................................ 1-42 IPR2 — Interrupt Pending Register 2 ................................ 1-42 IIPR — Interrupt in Progress Register ............................... 1-42 XDEV — Device Register .................................................... 1-43 XBER — Bus Error Register ........................................
1-6 1-7 1-8 2-1 2-2 2-3 2-4 2-5 2-6 3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 3-16 3-17 6-1 6-2 6-3 6-4 6-5 6-6 6-7 6-8 6-9 6-10 6-11 6-12 8-1 8-2 I/O Port Registers ................................................................. 1-35 LSB Registers ....................................................................... 1-40 XMI Registers ....................................................................... 1-43 Address Mapping from 30-Bit Mode to 32-Bit Mode ............
Preface Intended Audience This manual is written for the Digital service engineer. Document Structure This manual has eight chapters: • Chapter 1, Registers, lists the registers in this system and provides an illustration of each. • Chapter 2, Addressing, provides information on address space layout, addresses, and device types. • Chapter 3, Console, contains a list of the console commands, syntax, and error messages.
Conventions Used in This Document The text shown in command syntax uses these conventions: • Bold text indicates elements to be typed at the terminal. • Brackets ([]) indicate that an element is optional. • Braces ({}) indicate a choice from the enclosed list. • Angle brackets (<>) indicate that the enclosed text is not a literal depiction of the element but instead a reference to the kind of item that can appear in that position.
Table 1 VAX 7000 Documentation (Continued) Title Order Number Service Information Kit EK–7002A–DK Pocket Service Guide EK–7000A–PG Advanced Troubleshooting EK–7001A–TS Platform Service Manual EK–7000A–SV System Service Manual EK–7002A–SV Reference Manuals Console Reference Manual EK–70C0A–TM KA7AA CPU Technical Manual EK–KA7AA–TM MS7AA Technical Manual EK–MS7AA–TM I/O System Technical Manual EK–70I0A–TM Platform Technical Manual EK–7000A–TM Upgrade Manuals KA7AA CPU Installation Guide
Table 2 Related Documents Title Order Number General Site Preparation Site Environmental Preparation Guide EK–CSEPG–MA System I/O Options CIXCD Interface User Guide EK–CIXCD–UG DEC FDDIcontroller 400 Installation/Problem Solving EK–DEMFA–IP DEC LANcontroller 400 Installation Guide EK–DEMNA–IN DEC LANcontroller 400 Technical Manual EK–DEMNA–TM DSSI VAXcluster Installation and Troubleshooting Manual EK–410AA–MG InfoServer 150 Installation and Owner’s Guide EK–INFSV–OM KFMSA Module Installation
Chapter 1 Registers This chapter is a compilation of the major registers in components of the VAX 7000 system. Each section consists of a list of the registers in the component including register name, mnemonic, and address and illustrations of the major registers.
1.
Figure 1-1 LDEV — Device Register 31 30 16 15 DREV 0 DTYPE BXB-0100-92 Figure 1-2 LBER — Bus Error Register 31 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RSVD NSES <18> CTCE <17> DTCE <16> DIE SHE CAE NXAE <15> <14> <13> <12> CNFE <11> STE <10> TDE <9> CDPE2 <8> CDPE CPE2 CPE CE2 <7> <6> <5> <4> CE UCE2 UCE E <3> <2> <1> <0> BXB-0101-92 Registers 1-3
Figure 1-3 LCNR — Configuration Register 31 30 29 28 27 1 0 MBZ CEEN RSTSTAT NHALT NRST STF BXB-0102-92 Figure 1-4 LMMR0–7 — Memory Mapping Registers 31 17 16 MODULE_ADDR 11 10 9 8 5 4 3 2 1 0 RSVD NBANKS AW IA INT EN BXB-0104-92 Figure 1-5 LBESR0–3 — Bus Error Syndrome Registers 31 7 6 0 RSVD SYND_0 RSVD SYND_1 RSVD SYND_2 RSVD SYND_3 BXB-0105-92 1-4 Registers
Figure 1-6 LBECR0–1 — Bus Error Command Registers 31 20 19 18 17 16 15 14 11 10 7 6 5 3 2 0 CA <31:0> RSVD RSVD CID P CMD CNF SHARED DIRTY DCYCLE Figure 1-7 CA BXB-0106-92 LIOINTR — I/O Interrupt Register 31 16 15 MBZ 12 11 CPU 3 8 7 CPU 2 4 CPU 1 3 0 CPU 0 BXB-0109-92 Figure 1-8 LIPINTR — Interprocessor Interrupt Register 31 16 15 MBZ 0 MASK BXB-0120-92 Registers 1-5
Table 1-2 KA7AA-Specific Registers Mnemonic Register Name Byte Offset LMODE Mode BB + C00 LMERR Module Error BB + C40 LLOCK Lock Address BB + C80 LDIAG Diagnostic Control BB + D00 LTAGA Tag Address BB + D40 LTAGW Tag Write Data BB + D80 LCON Console Communication BB + E00 BB + E40 LPERF Performance Counter Control BB + F00 LCNTR Performance Counter BB + F40 BB + F80 LMISSADDR Last Miss Address BB + FC0 Figure 1-9 LMODE — Mode Register 31 17 16 15 MBZ 11 10 9 8 7 6
Figure 1-10 LMERR — Module Error Register 31 11 10 9 8 7 6 5 4 3 0 RSVD ARBDROP ARBCOL BDATADBE BDATASBE BMAPPE BSTATPE BTAGPE PMAPPE BXB-0122-92 Figure 1-11 LLOCK — Lock Address Register 31 30 29 28 1 0 LADR MBZ LOCK MBZ BXB-0126-92 Registers 1-7
Figure 1-12 LDIAG — Diagnostic Control Register 31 11 10 8 7 6 5 4 3 2 1 0 MBZ TAG_SEL FRIGN FBDP FBCP FDBE FSBE FSHARE FDIRTY SPARE BXB-0121-92 Figure 1-13 LTAGA — Tag Address Register 31 19 18 MBZ 0 TAG_ADDR BXB-0123-92 Figure 1-14 LTAGW — Tag Write Data Register 31 30 29 28 27 26 25 24 23 0 TAG_DATA BTAGP BSTATP BMAPP PMAPP VALID SHARED DIRTY MBZ BXB-0124-92 1-8 Registers
Figure 1-15 LCON — Console Communication Registers 31 0 CON_COM_DATA0 0 CON_COM_DATA1 1 BXB-0129-92 Figure 1-16 LPERF — Performance Counter Control Register 31 24 23 22 21 20 N_MASK 16 15 14 13 12 LC1_SEL LC1_HLT LC1_RUN MBZ 8 7 LC0_SEL 4 3 2 1 0 MBZ MA_FREQ LC1_OVFL LC0_OVFL LC0_HLT LC0_RUN MBZ BXB-0229-92 Figure 1-17 LCNTR — Performance Counter Registers 31 0 EV_COUNT0 EV_COUNT1 BXB-0228-92 Registers 1-9
Figure 1-18 LMISSADDR — Last Miss Address Register 31 29 28 MBZ 0 MISS_ADDR BXB-0227-92 1-10 Registers
Table 1-3 KA7AA Internal Processor Registers Mnemonic Register Name Address Dec Hex Type KSP Kernel Stack Pointer 0 0 R/W ESP Executive Stack Pointer 1 1 R/W SSP Supervisor Stack Pointer 2 2 R/W USP User Stack Pointer 3 3 R/W ISP Interrupt Stack Pointer 4 4 R/W P0BR P0 Base 8 8 R/W P0LR P0 Length 9 9 R/W P1BR P1 Base 10 A R/W P1LR P1 Length 11 B R/W SBR System Base 12 C R/W SLR System Length 13 D R/W 14 E R/W 1 CPUID CPU Identification PCBB
Table 1-3 KA7AA Internal Processor Registers (Continued) Mnemonic Register Name Address Dec Hex Type MAPEN Memory Management Enable 1 56 38 R/W TBIA Translation Buffer Invalidate All 57 39 WO TBIS Translation Buffer Invalidate Single 58 3A WO PME Performance Monitor Enable 1 61 3D R/W SID System Identification 62 3E RO TBCHK Translation Buffer Check 63 3F WO LMBOX Mailbox 121 79 WO 122 7A R/W 2 INTSYS Interrupt System Status PMFCNT Performance Monitoring Facili
Table 1-3 KA7AA Internal Processor Registers (Continued) Mnemonic Register Name Address Dec Hex Type BCDECC Software ECC 174 AE WO CHALT Console Halt 176 B0 R/W SIO Serial I/O 178 B2 R/W SOE_IE SROM_OE_Serial I.E.
Table 1-3 KA7AA Internal Processor Registers (Continued) Address Dec Hex Type Memory Management Exception PTE Address 233 E9 RO MMESTS Memory Management Exception Status 234 EA RO TBADR Translation Buffer Parity Address 236 EC RO TBSTS Translation Buffer Parity Status 237 ED R/W PCADR P-Cache Parity Address 242 F2 RO PCSTS P-Cache Status 244 F4 R/W PCCTL P-Cache Control 248 F8 R/W Mnemonic Register Name MMEPTE Figure 1-19 ICCS — Interval Clock Control and Status Regist
Figure 1-21 ICR — Interval Count Register 31 0 INT_COUNT BXB-0168-92 Figure 1-22 TODR — Time-of-Day Register 31 0 TOD BXB-0166-92 Figure 1-23 MCESR — Machine Check Error Summary Register 31 0 MCESR BXB-0236-92 Figure 1-24 SID — System Identification Register 31 24 23 CPU_TYPE 16 15 0 0 0 0 0 0 0 0 8 MIC_OPTIONS 7 0 MIC_REV BXB-0180-92 Registers 1-15
Figure 1-25 PCSCR — Patchable Control Store Control Register 31 13 12 11 10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 9 8 7 0 0 0 0 0 0 0 0 0 PCS_DATA SHIFT PCS_WRITE PCS_ENB PAR_PORT_DIS BXB-0137-92 Figure 1-26 ECR — Ebox Control Register 31 30 23 22 21 0 0 0 0 0 0 0 0 19 18 17 16 15 14 13 12 0 0 7 6 0 0 0 0 0 0 5 4 3 2 1 0 0 PMF_CLEAR PMF_LFSR PMF_EMUX PMF_PMUX PMF_ENB FBOX_TEST_ENB TO_CLOCK TO_TEST TO_OCCURRED FBOX_ST4_BYPASS_ENB TO_EXT FBOX_ENB BXB-0138-92 1-16 Registers
Figure 1-27 BIU_CTL — BIU Control Register 31 30 28 27 24 23 20 19 16 15 14 13 12 11 10 X X X X X X X 0 0 0 0 0 X BC_SIZE WS_IO 9 8 7 X X 6 5 4 3 2 1 0 XX IO_MAP "PV" QW_IO_RD PCACHE_MODE BC_SPD BC_FHIT OE ECC BC_ENB BXB-0213-92 NOTE: X bits read inverted values from DIAG_CTL Figure 1-28 DIAG_CTL — Diagnostic Control Register 31 28 27 26 24 23 X X X X SW_ECC PM_ACCS_TYPE PM_HIT_TYPE DIS_ECC_ERR 21 20 16 15 14 13 12 11 10 0 0 0 0 0 X X 8 X XX 7 6 5 0 X X X X X X TODR_TEST T
Figure 1-29 BIU_STAT — BIU Status Register 31 30 29 28 27 21 20 19 0 0 0 0 0 0 0 16 15 14 13 12 11 10 9 8 7 6 4 3 2 1 0 0 LOST_WRITE FILL_DSP_CMD BIU_ADDR FILL_ADDR FILL_SEO FILL_QW FILL_IRD FILL_DPERR FILL_CRD FILL_ECC BIU_SEO BIU_DSP_CMD BC_TCPERR BC_TPERR BIU_SERR BIU_HERR BXB-0162-92 Figure 1-30 BIU_ADDR — BIU Address Register 31 5 4 0 X X X X X BIU_ADDR BXB-0186-92 Figure 1-31 FILL_SYND — Fill Syndrome Register 63 14 13 0 7 HI 6 0 LO BXB-0163-92 1-18 Registers
Figure 1-32 FILL_ADDR — Fill Address Register 31 5 4 0 X X X X X FILL_ADDR BXB-0187-92 Figure 1-33 CHALT — Console Halt Register 31 0 CON_BASE_ADDR BXB-0170-92 Figure 1-34 VMAR — VIC Memory Address Register 31 11 10 5 4 3 ADDR 2 1 0 00 ROW_INDEX SUB_BLOCK LW BXB-0132-92 Figure 1-35 VTAG — VIC Tag Register 31 11 10 9 TAG 8 7 4 3 0 0 0 TAG_P DATA_P DATA_V BXB-0133-92 Registers 1-19
Figure 1-36 VDATA — VIC Data Register 31 0 VIC_DATA BXB-0134-92 Figure 1-37 ICSR — Ibox Control and Status Register 31 5 4 3 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 TPERR DPERR LOCK VIC_ACC_ENB BXB-0135-92 Figure 1-38 BPCR — Ibox Branch Prediction Control Register 31 16 15 BPU_ALGORITHM 9 8 7 6 5 0 0 0 0 0 0 0 4 3 0 0 LOAD_HISTORY FLUSH_CTR FLUSH_BHT MISPREDICT HISTORY As part of the power-up sequence, the microcode will write FECA0000, which is the following
Figure 1-39 MP0BR — Mbox P0 Base Register 31 30 29 9 1 0 SYS_VA_P0 8 0 0 0 0 0 0 0 0 0 0 BXB-0139-92 Figure 1-40 MP0LR — Mbox P0 Length Register 31 22 21 0 0 0 0 0 0 0 0 0 0 0 P0_LENGTH_LW BXB-0140-92 Figure 1-41 MP1BR — Mbox P1 Base Register 31 30 29 9 1 0 SYS_VA_P1 8 0 0 0 0 0 0 0 0 0 0 BXB-0141-92 Figure 1-42 MP1LR — Mbox P1 Length Register 31 22 21 0 0 0 0 0 0 0 0 0 0 0 P1_LENGTH_LW BXB-0142-92 Registers 1-21
Figure 1-43 MSBR — Mbox System Base Register 31 9 SYS_PT_PA 8 0 0 0 0 0 0 0 0 0 0 BXB-0143-92 Figure 1-44 MSLR — Mbox System Length Register 31 22 21 0 0 0 0 0 0 0 0 0 0 0 SYS_PT_LENGTH_LW BXB-0144-92 Figure 1-45 MMAPEN — Mbox Memory Management Enable Register 31 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MEM_MNG_ENB BXB-0145-92 Figure 1-46 PAMODE — Physical Address Mode Register 31 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PHYS_ADDR_MODE BXB-
Figure 1-47 MMEADR — Memory Management Exception Address Register 31 0 NME_FAULT_ADDR BXB-0147-92 Figure 1-48 MMEPTE — Memory Management Exception PTE Address Register 31 0 MIOD_FAULT_PTE_ADDR BXB-0148-92 Figure 1-49 MMESTS — Memory Management Exception Status Register 31 29 28 26 25 16 15 14 13 LOCK SRC 0 0 0 0 0 0 0 0 0 0 FAULT 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 M PTE_REF LV BXB-0149-92 Registers 1-23
Figure 1-50 TBADR — Translation Buffer Parity Address Register 31 0 VA_TB_PE BXB-0150-92 Figure 1-51 TBSTS — Translation Buffer Parity Status Register 31 29 28 9 SRC 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8 6 5 4 3 2 1 0 CMD EM_VAL TPERR DPERR LOCK BXB-0151-92 Figure 1-52 PCADR — P-Cache Parity Address Register 31 3 PC_PE_PA 2 1 0 0 0 0 BXB-0152-92 1-24 Registers
Figure 1-53 PCSTS — P-Cache Status Register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 3 2 1 0 CMD 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 PTE_ER PTE_ER_WR 4 LEFT_BANK RIGHT_BANK DPERR LOCK BXB-0153-92 Figure 1-54 PCCTL — P-Cache Control Register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 8 7 5 4 3 2 1 0 PMM RED_ENB ELEC_DISABLE PC_PE_ENB BANK_SEL FORCE_HIT I_STR_ENB D_STR_ENB BXB-0154-92
Table 1-4 Gbus Registers Register Address Gbus$WHAMI F700 0000 Gbus$LEDs F700 0040 Gbus$PMask F700 0800 Gbus$Intr F700 00C0 Gbus$Halt F700 0100 Gbus$LSBRST F700 0140 Gbus$Misc F700 0180 Gbus$RMode_ENA F780 0000 1-26 Registers
1.
Figure 1-55 LDEV — Device Register 31 30 16 15 DREV 0 DTYPE BXB-0100-92 Figure 1-56 LBER — Bus Error Register 31 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RSVD NSES <18> CTCE <17> DTCE <16> DIE SHE CAE NXAE <15> <14> <13> <12> CNFE <11> STE <10> TDE <9> CDPE2 <8> CDPE CPE2 CPE CE2 <7> <6> <5> <4> CE UCE2 UCE E <3> <2> <1> <0> BXB-0101-92 1-28 Registers
Figure 1-57 LCNR — Configuration Register 31 30 29 28 27 1 0 MBZ CEEN RSTSTAT NHALT NRST STF BXB-0102-92 Figure 1-58 IBR — Information Base Repair Register 31 3 2 1 0 MBZ SCLK XMT_SDAT RCV_SDAT BXB-0218-92 Figure 1-59 LBESR0–3 — Bus Error Syndrome Registers 31 7 6 0 RSVD SYND_0 RSVD SYND_1 RSVD SYND_2 RSVD SYND_3 BXB-0105-92 Registers 1-29
Figure 1-60 LBECR0–1 — Bus Error Command Registers 31 20 19 18 17 16 15 14 11 10 7 6 5 3 2 0 CA <31:0> RSVD CID RSVD P CMD CNF SHARED DIRTY DCYCLE CA BXB-0106-92 Figure 1-61 MCR — Memory Configuration Register 31 4 3 2 1 0 RSVD STRG RSVD DTYP BXB-0217-92 Figure 1-62 AMR — Address Mapping Register 31 17 16 NADR 11 10 RSVD 9 8 5 AW 4 3 IA 2 1 0 E NBANKS INTL BXB-0216-92 1-30 Registers
Figure 1-63 MSTR0–1 — Memory Self-Test Registers 31 0 MSTR0 31 0 MSTR1 BXB-0215-92 Figure 1-64 FADR — Failing Address Register 31 0 FADR BXB-0214-92 Figure 1-65 MERA — Memory Error Register A 31 12 11 10 RSVD 9 8 7 6 5 4 3 2 1 0 FSTR UCERB UCERA BNKER CERB CERA APER MULE UCER CER BXB-0219 -92 Registers 1-31
Figure 1-66 MSYNDA — Memory Syndrome Register A 31 8 7 0 RSVD SYNDA BXB-0223-92 Figure 1-67 MDRA — Memory Diagnostic Register A 31 30 29 28 27 26 10 RFR 9 8 7 6 5 4 3 2 1 0 RSVD DCRD BRFSH DRFSH FCPE FRPE IGSB MODE STPM EXST BPAS DWDC DRDC FCBS BXB-0225-92 Figure 1-68 MCBSA — Memory Check Bit Substitute Register A 31 8 RSVD 7 0 SCB_A BXB-0221-92 1-32 Registers
Figure 1-69 MERB — Memory Error Register B 31 4 3 2 1 0 RSVD APER MULE UCER CER BXB-0220 -92 Figure 1-70 MSYNDB — Memory Syndrome Register B 31 8 7 0 RSVD SYNDB BXB-0224-92 Figure 1-71 MDRB — Memory Diagnostic Register B 31 8 7 6 5 4 3 2 1 0 RSVD IGSB MODE STPM EXST BPAS DWDC DRDC FCBS BXB-0226-92 Registers 1-33
Figure 1-72 MCBSB — Memory Check Bit Substitute Register B 31 8 RSVD 7 0 SCB_B BXB-0222-92 1-34 Registers
1.
Table 1-6 I/O Port Registers (Continued) Mnemonic Register Name Physical Address Software Address LMBPR Mailbox Pointer 50 0060 A00 0C00 IPCNSE I/O Port Chip Node-Specific Error 50 0100 A00 2000 IPCVR I/O Port Chip Vector 50 0102 A00 2040 IPCMSR I/O Port Chip Mode Selection 50 0104 A00 2080 IPCHST I/O Port Chip Hose Status 50 0106 A00 20C0 IPCDR I/O Port Chip Diagnostic 50 0108 A00 2100 Figure 1-73 IBR — Information Base Repair Register 31 3 2 1 0 MBZ SCLK XMT_SDAT RCV_SDAT
Figure 1-75 LCPUMASK — CPU Interrupt Mask Register 31 16 15 MBZ 12 11 CPU 3 8 7 CPU 2 4 3 0 CPU 0 CPU 1 BXB-0109-92 Figure 1-76 LMBPR — Mailbox Pointer Register 31 6 5 0 Mailbox Address <37:6> MBZ BXB-0110-92 Figure 1-77 IPCNSE — I/O Port Chip Node-Specific Error Register 31 30 0 21 20 19 18 17 16 15 12 11 8 7 4 3 0 Reserved INTR_NSES MBX_TIP UP_HOSE_OFLO UP_HOSE_PKT_ERR UP_HOSE_PAR_ERR MULT_INTR_ERR DN_VRTX_ERR UP_VRTX_ERR IPC_IE UP_HIC_IE BXB-112-92 Figure 1-78 IPCVR — I/O
Figure 1-79 IPCMSR — I/O Port Chip Mode Selection Register 31 3 Reserved 2 1 0 00 0 ARB HIGH ARB CTL <1:0> BXB-0113-92 Figure 1-80 IPCHST — I/O Port Chip Hose Status Register 31 28 27 16 15 12 11 8 7 4 3 0 HOSE RST <3:0> H3 STAT <3:0> H2 STAT <3:0> H1 STAT <3:0> H0 STAT <3:0> BXB-0114-92 1-38 Registers
Figure 1-81 IPCDR — I/O Port Chip Diagnostic Register 31 30 24 23 22 21 14 13 12 11 10 Reserved FRC CNFE FRC CAE DIAG ECC <6:0> DIAG ECC EN 9 4 3 2 1 Reserved DIS LSB CMD HIC LPBCK EN FRS DAT PE FRC CMD PE FRC DN DPE <1:0> FRS DN SEQ ERR FRC DN ILL CMD BXB-0115-92 Registers 1-39 0
1.
Figure 1-83 IMSK — Interrupt Mask Register 31 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 7 6 5 4 3 0 RSVD RSVD RSVD ICC RSVD IWEI IIPE ITTO RSVD ICNAK IRER IMBER IRBDPE IDFDPE IXPE IWSE IRIDNAK IRSE INRR ICRD IWDNAK BXB-0208-92 Figure 1-84 LEVR — Error Vector Register 31 16 15 0 RSVD VECTOR DWLMA Error Interrupt Vector BXB-0202-92 Figure 1-85 LERR — Error Register 31 30 29 28 27 19 18 RSVD DHDPE XMIPE0 XMIPE1 XMIPE2 15 14 13 12 11 7 RSVD 6 5 4 3 2 0 RSVD IVID MBP
Figure 1-86 LGPR — General Purpose Register 31 0 LGPR BXB-0203-92 Figure 1-87 IPR1 — Interrupt Pending Register 1 31 28 27 24 23 IP8 IP7 20 19 IP6 16 15 IP5 12 11 IP4 8 7 IP3 4 3 IP2 0 IP1 BXB-0204-92 Figure 1-88 IPR2 — Interrupt Pending Register 2 31 30 24 23 RSVD 20 19 IP14 16 15 IP13 12 11 IP12 8 7 IP11 4 3 IP10 0 IP9 DWLMA Error Interrupt Pending BXB-0205-92 Figure 1-89 IIPR — Interrupt in Progress Register 31 20 19 RSVD 16 15 12 11 8 7 4 3 0 IDENTID I
Table 1-8 XMI Registers Mnemonic Register Name Address XDEV Device BB + 0000 XBER Bus Error BB + 0004 XFADR Failing Address BB + 0008 XFAER Failing Address Extension BB + 000C IBR Information Base Repair BB + 0010 Figure 1-90 XDEV — Device Register 31 20 19 MBZ 16 15 DREV 0 Device Type BXB-0233-92 Registers 1-43
Figure 1-91 XBER — Bus Error Register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 4 3 2 1 0 FCID EHWW DXTO EMP RSVD STF ETF NSES Commander Errors TTO RSVD CNAK RER RSE NRR CRD WDNAK Responder Errors RIDNAK WSE PE IPE Miscellaneous WEI XFAULT CC XBAD NHALT NRST ES 1-44 Registers BXB-0234-92
Figure 1-92 XFADR — Failing Address Register 31 30 29 0 Failing Address FLN BXB-0235-92 Figure 1-93 XFAER — Failing Address Extension Register 31 28 27 26 25 CMD 16 15 0 0 ADDRESS EXTENSION 0 MASK BXB-0230-92 Figure 1-94 IBR — Information Base Repair Register 31 3 2 1 0 MBZ SCLK XMT_SDAT RCV_SDAT BXB-0218-92 Registers 1-45
Chapter 2 Addressing This chapter includes an overview of the VAX 7000 system and addressing information for the buses used in the system.
2.
2.
Table 2-1 Address Mapping from 30-Bit Mode to 32-Bit Mode 30-Bit Mode Address 32-Bit Mode Address 0000 0000 — 1FFF FFFF 0000 0000 — 1FFF FFFF 2000 0000 — 3FFF FFFF E000 0000 — FFFF FFFF Table 2-2 LSB Node Base Addresses Node Module Base Physical Address (BB) 0 CPU 0 F800 0000 1 Processor or memory F840 0000 2 Processor or memory F880 0000 3 Processor or memory F8C0 0000 4 Memory F900 0000 5 Memory F940 0000 6 Memory F980 0000 7 Memory F9C0 0000 8 IOP FA00 0000 Broadca
Table 2-3 Device Type Codes Device Code (hex) KA7AA 8002 MS7AA 4000 IOP 2000 DWLMA 102A CIXCD 0C05 DEMFA 0823 DEMNA 0C03 DWMBB 2002 KDM70 0C22 KFMSA 0810 Addressing 2-5
2.
2.4 VAXBI Addresses To examine a VAXBI register from the VAX 7000 console (see Example 2-1), you need three pieces of information: 1. The XMI number (0–3) to which the VAXBI bus is connected. 2. The base address of the VAXBI node (see Table 2-5). 3. The offset of the VAXBI register to be examined (see Table 2-6).
Table 2-5 Base Addresses of VAXBI Nodes Node ID Base Address 0 0000 0000 1 0000 2000 2 0000 4000 3 0000 6000 4 0000 8000 5 0000 A000 6 0000 C000 7 0000 E000 8 0001 0000 9 0001 2000 A 0001 4000 B 0001 6000 C 0001 8000 D 0001 A000 E 0001 C000 F 0001 E000 2-8 Addressing
Table 2-6 Address Offsets of VAXBI Registers Mnemonic Register Name Address Offset DTYPE Device bb 1 + 00 VAXBICSR VAXBI Control and Status bb + 04 BER Bus Error bb + 08 EINTRSCR Error Interrupt Control bb + 0C INTRDES Interrupt Destination bb + 10 IPINTRMSK IPINTR Mask bb + 14 FIPSDES Force-Bit IPINTR/STOP Destination bb + 18 IPINTRSRC IPINTR Source bb + 1C SADR Starting Address bb + 20 EADR Ending Address bb + 24 BCICSR BCI Control and Status bb + 28 WSTAT Write Stat
Chapter 3 Console This chapter contains an overview of the console command set and command syntax. It includes a section on device naming and examples of the use of selected commands.
3.
Table 3-1 Console Commands (Continued) Command Description test Test a specified device, a subsystem, or the entire system (default) update Copy the contents of the EEPROM or FEPROMs on the boot processor to the EEPROM or FEPROMs on the specified secondary processor(s) # or ! Introduce a comment Table 3-2 Boot Command Options Option Meaning -file Boot from the file -flags Boot flags that qualify the bootstrap.
Table 3-3 Cdp Command Options Option Meaning -a Set device allocation class, allclass -i Select interactive mode; set all parameters -n Set device node name, nodename (up to 16 characters) -o Overridde warning messages -u Set device unit number, unitnum -sa allclass Set allclass for all DSSI devices in the system to the specified value -sn Set nodename to either RFhscn or TFhscn h is the device hose number (0–3) s is the device slot number (1–14) c is the device channel number (0, 1) n is t
Table 3-5 Create Command Option Option Meaning -nv Store the nonvolatile environment variable in EEPROM Table 3-6 Deposit and Examine Command Options Option Meaning -b Define data size as a byte -d Disassemble instruction at current address (examine command only) -h Define data size as a hexword -l Define data size as a longword; initial default -o Define data size as an octaword -q Define data size as a quadword -w Define data size as a word -n val Number of consecutive locations t
Table 3-7 Set EEPROM Command Options Option Meaning field Record the LARS report number and comment manufacturing Record manufacturing information: module serial number, module part number, and module firmware revision serial Record system serial number Table 3-8 Set Host Command Options Option Meaning -bus b DSSI bus on which the node resides -dup Remote node is a DUP server Table 3-9 Show EEPROM Command Options Option Meaning diag_sdd Display failure information logged by symptomdir
Table 3-10 Show Power Command Options Option Meaning -h History status — the value of each parameter at the last system shutdown -s Current status (default) main Power status of the main cabinet (default) right Power status of the expander cabinet to the right of the main cabinet left Power status of the expander cabinet to the left of the main cabinet Table 3-11 Test Command Options Option Meaning -write Select writes to media as well as reads (read-only is the default).
Table 3-12 Update Command Options Option Meaning -flash Update the FEPROMs on the specified secondary processor -eeprom Update the EEPROM on the specified secondary processor For more information: VAX 7000 Console Reference Manual VAX 7000 Advanced Troubleshooting 3-8 Console
3.2 Environment Variables An environment variable is a name and a value association maintained by the console program. The value associated with an environment variable is an ASCII string (up to 128 characters) or an integer. Volatile environment variables are initialized by a system reset; others are nonvolatile across system failures. Environment variables can be created, modified, displayed, and deleted using the console create, set, show, and clear commands.
Table 3-13 Environment Variables (Continued) Variable Attribute Function cpu_enabled Nonvolatile A bitmask indicating which processors are enabled to run (leave console mode). If not defined, all processors are considered enabled. Default is 0xFF. cpu_primary Nonvolatile A bitmask indicating which processors are enabled to become the next boot processor after the next reset. If not defined, all available processors are considered enabled. Default is 0xFF.
3.3 Device Name Fields Device names are used in several console commands. A device name is expressed in the form ddccuuuu.node.channel.slot.hose. Fields are separated by periods. Table 3-14 lists the field definitions.
3.
Table 3-15 Console Special Characters Character Function Return Carriage return; ends a command line Backslash Line continuation Delete key; deletes previously typed character X Help By itself, displays first-level help. When pressed after part of a command, displays options available.
3.5 Boot Command Example 3-1 Boot Command — Booting from an InfoServer >>> show network polling for units on demna0, slot 3, xmi0... exa0.0.0.3.0 08-00-2B-0B-BB-ED >>> boot exa0 -file ISL_LVAX_BL10 Initializing... F E D C B A 9 8 7 6 5 4 3 2 1 A M . . . . . P o + . . . . . + . . . . . . . E o + . . . . . + . . . . . . . E + + . . . . . + . . . . . . . E . . . . . . . . . . . . . . . . + . . . . . . . + . . . . . . . . . . . . . . . . . . . + . . . . . . . + . . .
Example 3-1 Boot Command — Booting from an InfoServer (Continued) Service Name Format: Service Number Service Name Server Name Ethernet ID #1 VMS054 ESS_08002B0BBBED 08-00-2B-0B-BB-ED #2 CD_BIN_83371 ESS_08002B0BBBED 08-00-2B-0B-BB-ED #1 INFO3$RZ57 INFO3 08-00-2B-26-A6-98 #2 CD_DOC_0050 INFO3 08-00-2B-16-04-98 Enter a Service number or for more: 1 [operating system banner appears] Console 3-15
Table 3-16 Sample Boot Commands Boot From Sample Boot Command Local device boot dua2.2.0.1.0 InfoServer on Ethernet boot exa0 -file ISL_LVAX_BL10 InfoServer on FDDI boot fxa0 -file ISL_LVAX_BL10 CI VAXcluster boot -fl 0,4,0 dua20.14.0.2.0 Shadow set b -fl 8DAC,2,0 dua3500.14.0.12.1, dua63.14.0.12.1 DSSI VAXcluster boot -flags 0,3,0 dub1.1.0.6.
3.6 Cdp Command Example 3-2 Cdp Command >>> show device polling for units on kfmsa0, slot 0, xmi0... dua5.0.0.13.0 BASHFL$DIA5 RF71 polling for units on cixcd0, slot 14, xmi1... dub44.1.0.13.0 $1$DIA44 (BLANK4) RF71 >>> cdp -i dua5.0.0.13.0: Node Name [BASHFL]? Allocation Class [0]? Unit Number [5]? dub44.1.0.13.0: Node Name [BLANK4]? Allocation Class [1] Unit Number [44]? ! Interactive mode >>> cdp -n dua5 dua5.0.0.13.0: Node Name [BASHFL]? ! Set device node name of dua5. >>> cdp -a dua5.0.0.13.
3.
3.8 Show Device Command Example 3-4 Show Device Command >>> show device polling for units on kfmsa0, slot 1, xmi0... dub1.1.1.1.2 RF3101$DIA1 RF72 dub3.3.1.1.2 RF3103$DIA3 RF72 polling for units on kdm700, slot 11, xmi0... duc1.0.0.11.2 DUC1 RA70 duc2.0.0.11.2 DUC2 RA70 duc3.0.0.11.2 DUC3 RA70 duc213.0.0.11.
3.9 Show Network Command Example 3-5 Show Network Command >>> show network polling for units on demna0, slot 14, xmi0... exa0.0.0.14.0: 08-00-2B-24-3F-E1 polling for units on demfa0, slot 1, xmi1... fxa0.0.0.1.
3.10 Show Power Command Example 3-6 Show Power Command >>> show power Cabinet: Main Regulator : A B C ------------------------------------------------------------------------------Primary Micro Firmware Rev : 2.0 2.0 2.0 Secondary Micro Firmware Rev : 2.0 2.0 2.0 Power Supply State : NORMAL NORMAL BBU MODE AC Line Voltage (V RMS) : 113.71 114.35 115.93 DC Bulk Voltage (VDC) : 227.02 227.02 227.02 48V DC Bus Voltage (VDC) : 47.57 47.57 47.57 48V DC Bus Current (ADC) : 30.17 29.68 29.
Table 3-17 Abbreviations Used in Show Power Command Output Abbreviation Meaning Power Supply State NORMAL Normal AC operation BBU MODE UPS mode BRKR OPEN Breaker open NO AC IN No AC voltage KEYSW OFF Keyswitch off NON FATAL Nonfatal fault FATAL Fatal fault SPARE Heatsink Status BROKEN Broken FAULT Fault (red zone) WARNING Warning NORMAL Normal operation Battery Pack Status NO BATTERY Battery pack not installed BATT FLT Battery pack failure BBU INH UPS inhibit CHG INH Charger i
Table 3-17 Abbreviations Used in Show Power Command Output (Continued) Abbreviation Meaning Last UPS Test Status NO BATTER Battery pack not installed NOT READY Battery pack not ready (only if test requested) ABORTED Test aborted TESTING Test in progress FAILED Test failed PASSED Test passed Console 3-23
Chapter 4 Diagnostics Diagnostics are run using console commands. This chapter contains examples of diagnostic sessions.
4.1 Test Command Example 4-1 Test Command — System Test >>> test -t 120 Configuring system...
Example 4-1 Test Command — System Test (Continued) Starting device exerciser on dua30.14.0.1.0 (id #86) Test time has expired... Stopping floating point exerciser on ka7aa0 (id #57) Stopping floating point exerciser on ka7aa1 (id #58) Stopping memory exerciser on ka7aa0 (id #59) Stopping memory exerciser on ka7aa1 (id #60) Stopping multiprocessor exerciser (id #61) Stopping network exerciser on exa0.0.0.4.0 (id #62) Stopping network exerciser on exb0.0.0.5.0 (id #63) Stopping network exerciser on exc0.0.0.
Example 4-2 Test Command — Write/Read/Compare Test of All Disks Not Associated with Controller "a" >>> test -nowrite "dua*" -write -t 120 Configuring system... Default system exerciser selected for run time of 120 seconds Type Ctrl/C to abort You have selected destructive testing of the following devices: dub0.0.0.2.0 dub1.1.0.2.0 dub2.2.0.2.0 dub3.3.0.2.0 duc0.0.0.3.0 duc1.1.0.3.0 dud0.0.0.E.0 dud1.1.0.E.
Example 4-2 Test Command — Write/Read/Compare Test of All Disks Not Associated with Controller "a" (Continued) Stopping device exerciser Stopping device exerciser Stopping device exerciser Stopping device exerciser Stopping device exerciser Stopping device exerciser Stopping device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Starting device exerciser Test time h
Example 4-3 Test Command — Destructive Exercising Selected, Then Aborted >>> test -w -n "dua*" Configuring system... Default system exerciser selected for run time of 600 seconds Type Ctrl/C to abort You have selected destructive testing of the following devices: dub0.0.0.2.0 dub1.1.0.2.0 dub2.2.0.2.0 dub3.3.0.2.0 duc0.0.0.3.0 duc1.1.0.3.0 dud0.0.0.E.0 dud1.1.0.E.0 Are you sure you want to perform writes to these disks? [yes/(no)] no Testing aborted...
Example 4-5 Test Command — Detection of Memory Data Compare Error >>> set d_report full >>> test ms7aa* Configuring system...
Example 4-6 Test Command — Use of Wildcard >>> test dem*a* Configuring system... Testing dem*a* Type Ctrl/C to abort Initializing DEMNA0 Initializing DEMNA1 Initializing DEMFA0 DEMNA0 self-test passed DEMNA1 self-test passed DEMFA0 self-test passed Starting network exerciser on exa0.0.0.4.0 in internal mode (id #144) Starting network exerciser on exb0.0.0.5.0 in external mode (id #145) Starting network exerciser on fxa0.0.0.2.1 in external mode (id #146) Test time has expired...
Example 4-7 Test Command — Test All Devices Associated with XMI0 >>> test xmi0 -omit demna2 Configuring system... Testing xmi0 Type Ctrl/C to abort KA7AA0 running module tests on DWLMA0 DWLMA0 module tests passed Initializing DEMNA0 Initializing DEMNA1 Initializing CIXCD0 Initializing KDM700 Initializing DEMFA0 DEMNA0 self-test passed DEMNA1 self-test passed CIXCD0 self-test passed KDM700 self-test passed DEMFA0 self-test passed Starting network exerciser on exa0.0.0.4.
4.2 Set Host Command — Running DUP-Based Diagnostics and Utilities Example 4-8 Set Host Command — Running DUP-Based Diagnostics and Utilities >>> show device kdm700 polling for units on kdm700, slot 12, xmi0... dua32.0.0.12.0 DUA32 RA70 dua34.0.0.12.0 DUA34 RA70 dua77.0.0.12.0 DUA77 RA70 >>> set host -dup dua32.0.0.12.0 dup: starting DIRECT on kdm70_a.0.0.12.0 () DIRECT 1 D Directory Utility ILEXER 1 D InLine Exerciser Task? ilexer dup: starting ILEXER on kdm70_a.0.0.12.
Example 4-8 Set Host Command — Running DUP-Based Diagnostics and Utilities (Continued) Select Select Select Select Select test number (1:4) [1] ? start block number (0:547040) [0] ? end block number (0:547040) [547040] ? 500 data pattern number 0=ALL (0:15) [0] ? another drive (Y/N) [] ? *** No default is allowed.
4.3 Set Host Command — Running Diagnostics on a Remote XMI Adapter Example 4-9 Set Host Command — Running Diagnostics on a Remote XMI Adapter, Failing Case >>> set host demna0 Connecting to remote node, ^Y to disconnect. t/r RBDE> ST0/TR ;Selftest 3.
Example 4-10 Set Host Command — Running Diagnostics on a Remote XMI Adapter, Passing Case >>> set h demna0 Connecting to remote node, ^Y to disconnect. t/r RBDE> ST0/TR ;Selftest 3.
Chapter 5 FRU Locations This chapter shows the location of these field-replaceable units: • FRUs Common to Every Platform — FRUs Accessible from the Front of the Cabinet — FRUs Accessible from the Rear of the Cabinet • Platform Cables • FRUs in the XMI Plug-In Unit • FRUs in the Disk Plug-In Unit • FRUs in the Battery Plug-In Unit FRU Locations 5-1
5.
1 70–28574–01 LSB centerplane and card cage 1, 2 2 E2045–AA CPU module 3 E2043–AA or E2043–BA or E2043–CA or E2046–AA Memory module 64 Mbytes 3 Memory module 128 Mbytes 3 Memory module 256 Mbytes 3 Memory module 512 Mbytes 3 4 54–20306–01 Control panel 2 5 30–33796–01 or 30–33796–02 Power regulator 6 12–35173–01 Blower 1 7 DWLMA–AA/BA XMI plug-in unit 1 (see page 5-8 for FRUs in this PIU) 8 BA654–AA Disk plug-in unit 3, 4 (see page 5-10) 9 H7237–AA Battery plug-in unit 1 (see page
Figure 5-2 Platform Cabinet (Rear) Showing FRU Locations 4 5 Rear 6 1 or 11 2 7 8 3 9 10 11 or 12 BXB-0032F-92 5-4 FRU Locations
1 70–28574–01 LSB centerplane and card cage 1, 2 2 E2044–AA IOP module 3 E2043–AA or E2043–BA or E2043–CA or E2046–AA Memory module 64 Mbytes 3 Memory module 128 Mbytes 3 Memory module 256 Mbytes 3 Memory module 512 Mbytes 3 4 54–20300–01 Cabinet control logic module (CCL) 5 54–36203–04 CCL pressure sensor 6 TF85–AA Removable media device 1 Includes these FRUs: TK85 54–19089–01 54–20868–01 17–03123–01 17–03164–01 17–03348–01 17–03443–01 17–03444–01 17–03448–01 17–03505–01 17–03508–01 Disk
5.
1 17–03118–01 48V LSB power (gray) 2 17–03118–02 48V LSB power (yellow) 3 17–03119–01 48V power/signal to PIU 4 17–03127–01 AC to LDC 5 17–03126–01 48V power/sense to blower 6 17–03124–01 AC to CCL signal 7 17–03120–01 Control panel to CCL signal 8 17–03123–01 LDC to CCL signal 9 17–03164–01 +5/+12 LDC to tape power 10 17–03121–01 CCL to LSB bulkhead signal 11 17–03122–01 LSB bulkhead to LSB backplane 12 17–03085–01 I/O cable, long (to expander cabinet — 114 in) 13 17–03
5.
1 70–30396–01 XMI backplane assembly 2 30–36010–01 Module A (power regulator) 3 30–36009–01 Module B (power regulator) 4 T2028–AA DWLMA module (LSB to XMI — slot 8) 5 T2030–YA Clock and arbitration module (slot 7) These FRUs can reside in any1 XMI slot except 7 or 8: T2020–00 XMI to NI controller T2027–00 XMI to FDDI controller T2080–YA XMI to CI controller T2036–AA XMI to DSSI controller 6 17–03162–01 Signal cable 7 17–03163–01 48V power cable 8 17–03202–01 Power distribution
5.
1 RF73–EA RF73 disk drive Includes these FRUs: 54–19119–01 70–28814–01 RF73–EA ECM module RF73 HDA 2 54–20868–01 Local disk converter (LDC) 3 54–21664–01 Disk control panel 4 17–02382–0x DSSI brick jumper cable (BC21Q-xx) 5 17–03417–01 RF73 signal 6 17–03418–01 LDC power 7 17–03419–01 LDC signal 8 17–03420–01 RF73 power 9 17–03422–01 Signal and power 10 17–03423–01 Disk control panel to bulkhead 11 17–03424–01 DSSI bus 1 through 3, 5 through 8 , 10 , and 4 connects
5.5 FRUs in the Battery Plug-In Unit Figure 5-6 Battery Plug-In Unit (Rear) Showing FRU Locations 7 (Block B) 1 3 5 3 2 6 4 5 8 1 (Block A) 4 2 1 (Block C) 3 BXB-0344-92 NOTE: The battery plug-in unit is shown in Figure 5-6 without its enclosure.
1 12–36168–02 Battery 2 12–39982–01 Fuse (LPN–RK–90) 3 17–03421–01 Battery sensor cable 4 17–03492–01 Intermediate cable, battery block A 5 17–03493–01 Intermediate cable, battery block B or C 6 17–03494–01 Power regulator A to battery block A 7 17–03494–02 Power regulator B to battery block B 8 17–03494–03 Power regulator C to battery block C FRU Locations 5-13
Chapter 6 Controls and Indicators This chapter describes controls and indicators on these system components: • Control Panel • TF85 Removable Media Device • Cabinet Control Logic Module • IOP Module • KA7AA Processor Module • Power Regulator • AC Input Box • BA651 XMI PIU Power Regulators • DWLMA Module • BA654 Disk PIU Controls and Indicators 6-1
6.1 Control Panel Figure 6-1 Control Panel O Disable Secure Front Enable Restart Key On Run Fault BXB-0015B-92 Table 6-1 Control Panel Indicator Lights Light State Meaning Key On On Power supplied to entire system; blower running. (Green) Off Power supplied only to CCL module. Run On Primary processor is running the operating system or user programs. (Green) Off Primary processor is in console mode. Fault On Fault on LSB, XMI, or an I/O bus.
6.
6.3 Cabinet Control Logic Module Figure 6-3 CCL Module LEDs Rear Power LED PIU 1 PIU 2 PIU 3 PIU 4 BXB-0044D-92 Table 6-3 CCL Module LEDs LED Meaning Power LED Power is present on the CCL module. PIU 1 – 4 Power is present in the PIU regulators in the quadrant indicated. (Q1 is to the left when viewing the cabinet from the front, Q2 is behind Q1, Q3 is in the front right, and Q4 is behind Q3.
6.4 IOP Module Figure 6-4 Table 6-4 IOP (E2044-AA) Module LED IOP (E2044-AA) Module LED Condition Meaning On One of the following: • All IOP-specific and I/O adapter tests passed. • An I/O adapter test failed, and the error was isolated to the adapter. Off One of the following: • An IOP-specific test failed. • An I/O adapter test failed, and the error could not be isolated to the adapter. • The processor module failed.
6.5 KA7AA Processor Module Figure 6-5 Processor (E2045) LEDs After Self-Test Self-test passed Self-test failed MSB Failing test number LSB STP Table 6-5 Processor (E2045) LEDs After Self-Test Test Result LEDs Self-test passed — boot processor STP LED and two LEDs above it are on. All others are off. Self-test passed — secondary processor STP LED and one LED above it are on. All others are off. Self-test failed STP LED and two LEDs above it are off.
Table 6-6 Self-Test LEDs Indicating Defective DC-to-DC Converter Defective Converter on This Module Processor Modules Memory Modules One module’s STP LED is off; all others are on. All STP LEDs are on. STP LED is off. Processor module with STP LED off All STP LEDs are on. One module’s STP LED is off; all others are on. STP LED is off. Memory module with STP LED off All STP LEDs are on. All STP LEDs are on. STP LED is off.
6.
6.7 AC Input Box Figure 6-7 AC Input Box — Indicators on Circuit Breaker Rear A - Regulator slot A B - Regulator slot B C - Regulator slot C S - Sensor circuit Breaker Indicator C Table 6-8 B A S BXB-0049A-92 AC Input Box — Indicators on Circuit Breaker Color Meaning Red Pole is in on position; not tripped. Green Pole is in off position or tripped due to an overload. NOTE: In the Japanese version (30–33798–03), all poles trip if one does, causing all indicators to turn green.
6.
Table 6-9 XMI PIU Power Regulator Lights (Regulators A and B) Light Color State Meaning Does light latch? MOD OK Green On Regulator is working. No Off Regulator is not working. OC Yellow On Overcurrent condition Yes OT Yellow On Overtemperature condition Yes OV Yellow On Overvoltage condition Yes 48V Green On 48V is present. No Table 6-10 XMI PIU Power Switches (Regulator B) Switch Function Reset Momentary switch resets all lights on regulators A and B.
6.
6.
Chapter 7 Restoring Corrupted ROMs The following list tells you how to determine when to use these sections of this chapter: • Restoring a Corrupted EEPROM Use this section when the message "EEPROM image failed to verify" is displayed on the console terminal. • Restoring Corrupted Firmware on an Adapter Use this section when an adapter fails self-test and the problem is corrupted firmware.
7.1 Restoring a Corrupted EEPROM Example 7-1 Using the Build EEPROM Command to Restore a Corrupted EEPROM EEPROM image failed to verify EEPROM environment parameters not set up Fail to update EEPROM envar on CPU 1 >>> build eeprom Creating new EEPROM image System Serial Number> gao1234567 Module Serial Number> sgo0000001 Module Unified 2-5-2-4 Part Number> 80-E2045-AA-0E04 Module Firmware Revision> 1.00 >>> initialize NOTE: See Chapter 3 for more information on the console commands for the EEPROM.
7.2 Restoring Corrupted Firmware on an Adapter If an adapter fails self-test, use this procedure to determine if the firmware is corrupted, and if it is, to update the firmware: 1. Boot the console CD-ROM (Example 7-2). 2. Use the LFU display or show command to indicate (by returning the mnemonic "unknown") if firmware has been corrupted (Example 7-3). 3. Use the LFU update command to write the new firmware (Example 7-4). 4. Exit (Example 7-5).
Example 7-2 Booting LFU (Continued) INFO3 08-00-2B-16-04-D4 #3 VAX7000_V01 OPUS_ESS 08-00-2B-18-A9-75 Enter a Service Number or for more: 3 Copyright Digital Equipment Corporation 1992 All Rights Reserved. Loadable Environment Rev: V1.0-1625 Jul 12 1992 10:50:56 ***** Loadable Firmware Update Utility ***** Version 2.
Example 7-3 LFU Display and Show Commands Function? disp Name Type LSB 0+ KA7AA (8002) 7+ MS7AA (4000) 8+ IOP (2000) Rev Mnemonic FW Rev HW Rev 0000 0000 0001 ka7aa0 ms7aa1 iop0 1.00 N/A N/A E04 A01 A N/A 3.00 6.08 A N/A 69.
Example 7-4 LFU Update Command Function? update unknown0 Enter device name or ’exit’ to skip this device. Device name? cixcd Hardware revision? A01 WARNING: updates may take several minutes to complete for each device DO NOT ABORT! unknown0 Updating to 70.00... Reading Device... Verifying 70.00... PASSED. Function? Example 7-5 LFU Exit Command Function? exit Initializing... F E D C B A 9 8 A o . o . + . 7 M + . + . + . 6 . . . . . . . 5 . . . . . . . 4 . . . . . . . 3 . . . . . . . 2 . . .
7.3 Restoring Corrupted Firmware on a CPU Use this procedure when the prompt VAX-7000/10000-FRRC> appears at the console terminal after power-up. (This prompt appears only if the console terminal is set at 9600 baud.) This prompt indicates that the firmware in the FEPROMs on the processor module has been corrupted. The following must be available for you to use this procedure: • A source system that can logically connect, through the console port, to the system that has the corrupted firmware.
Example 7-6 Preparing the Source System to Restore Corrupted Firmware on a CPU $ set term/speed=9600/perm txa3: $ mcr ess$ladcp LADCP> bind VAX7000_V01 VAX7000_V01 is bound to DAD104 LADCP> exit $ mount/ov=id dad104 $ dir dad104:[sys0.sysexe] Directory DAD104:[SYS0.SYSEXE] VAX7000_1000_CONSOLE_IMAGE.GROM Example 7-7 Running Kermit and Setting Parameters $ kermit Kermit-32> set file type binary Kermit-32> set retry packet 5 Kermit-32> set send time 5 Kermit-32> show all VMS Kermit-32 version 3.3.
Example 7-7 Running Kermit and Setting Parameters (Cont) Padding character Time out End of line character Quoting character Start of packet 000 (octal) 5 (sec) 015 (octal) 043 (octal) 001 (octal) Receive parameters Packet length Padding length Padding character Time out End of line character Quoting character 8-bit quoting character Start of packet 80 (dec) 0 (dec) 000 (octal) 5 (sec) 015 (octal) 043 (octal) 046 (octal) 001 (octal) Transmit parameters Delay Echo Repeat quoting character Example 7-8 0.
Chapter 8 System Errors This chapter includes information on the machine check frame and the parse trees.
8.
Table 8-1 Machine Check Frame Parameters Longword Bits Contents SP+0 <31:0> Byte count. The size of the stack frame in bytes, not including the PC, PSL, or the byte count longword. Stack frame PC and PSL values should always be referenced using this count as an offset from the stack pointer. SP+4 <31:29> AST LVL. The current value of the register. <23:16> Machine check code. The reason for the machine check, as listed in Table 8-2. <7:0> CPUID. Contains the current value of the CPUID register.
Table 8-1 Machine Check Frame Parameters (Continued) Longword Bits Contents <7> VR. The VAX Restart bit, which is used to communicate restart information between the microcode and the operating system. When set, this bit indicates that no architectural state has been changed by the instruction that was executing when the error was detected. When clear, it indicates that architectural state was modified by the instruction. SP+28 <31:0> PC. The value of the program counter at the time of the fault.
8.2 Machine Check Parse Tree Figure 8-2 Machine Check Parse Tree Code (Hex) EXE$MCHK MCHK_UNKNOWN_MSTATUS 01 MCHK_INT.ID_VALUE 02 MCHK_CANT_GET_HERE 03 MCHK_MOVC.STATUS 04 MCHK_ASYNC_ERROR 05 Select ONE Unknown memory management status error Illegal interrupt ID error Impossible microcode address MOVCx status encoding error Select ALL TBSTS.LOCK <0> TBSTS.DPERR <1> TB PTE data parity error TBSTS.DPERR <2> TB tag parity error None of the above Inconsistent error ECR.
Figure 8-2 Machine Check Parse Tree (Continued) 1 2 3 BIU_STAT.FILL_SEO <14> BIU_STAT.BIU_SEO <7> BIU_STAT.BC_TPERR <2> Lost B-cache ECC error Lost B-cache fill error Select ONE BIU_STAT/BIU_DSP_CMD <6:4> = DREAD D-stream read B-tag parity error BIU_STAT/BIU_DSP_CMD <6:4> = IREAD I-stream read B-tag parity error BIU_STAT.BC_TCPERR <3> Select ONE BIU_STAT/BIU_DSP_CMD <6:4> = DREAD D-stream read B-tag parity error BIU_STAT/BIU_DSP_CMD <6:4> = IREAD I-stream read B-tag parity error BIU_STAT.
Figure 8-2 Machine Check Parse Tree (Continued) 1 2 3 BIU_STAT.BC_TCPERR <3> Select ONE BIU_STAT.BIU_DSP_CMD<6:4> = DREAD PTE B-tag control parity error during D-stream read BIU_STATE.BIU_DSP_CMD<6:4> = IREAD Otherwise... PTE B-tag control parity error during I-stream read PTE B-tag control parity error during write BIU_STAT.
Figure 8-2 Machine Check Parse Tree (Continued) A BC_TAG <11> LBER.UCE <1> MERA.UCER Other CPU LMERR.BDATA_DBE Else D-stream cache double-bit error D-stream read double-bit error D-stream error on other CPU D-stream read LSB double-bit error B BC_TAG <11> LBER.UCE <1> MERA.UCER Other CPU LMERR.BDATA_DBE Else C BC_TAG <11> LBER.UCE <1> MERA.UCER Other CPU LMERR.BDATA_DBE Else D BC_TAG <11> LBER.UCE <1> MERA.UCER Other CPU LMERR.
Figure 8-2 Machine Check Parse Tree (Continued) E BIU_STAT.BIU_DSP_CMD<6:4> = Read LBER.NSES<18> IMERR.ARBDROP<12> Read ARB drop Else Inconsistent error LBER.E<0> and LBERCR1.CID<10:7> = This_CPU LBER.NXAE<12> LBECR.CA<37:35> = CSR Read LBER.CA<37:35> = Read LBER.CA<37:35> = Private LBER.CPE<5> Else NXM to LSB I/O space NXM to LSB memory NXM to self I/O space LSB command parity error Inconsistent LBER.E Else Previous system error latched Inconsistent BIU.STAT.BIU_DSP_CMD<6:4>=Loadlock LBER.
Figure 8-2 Machine Check Parse Tree (Continued) 1 2 E Continued LBER.E<0> and LBECR.CA<37:35> = Read and LBECR1.CID<10:7> = This_CPU LBER.NXAE<12> LBER.CPE<5> Else LBER.
Figure 8-2 Machine Check Parse Tree (Continued) F BIU_STAT.BIU_DSP_CMD<6:4>=Read LBER.NSES<18> IMERR.ARBDROP<12> Else PTE read ARB drop Inconsistent error LBER.E<0> and LBECR1.CID<10:7> = This_CPU LBER.NXAE<12> LBER.CPE<5> Else PTE NXM to LSB memory PTE LSB command parity error Inconsistent LBER.E Else Previous system error latched Inconsistent BIU_STAT.BIU_DSP_CMB<6:4>=Loadlock IMERR.ARBDROP<10> PTE read ARB drop IMERR.
8.3 Hard Error Parse Tree Figure 8-3 Hard Error Parse Tree EXE$HERR BIU_STAT.LOST_WRITE_ERR BIU_STAT.BC_TPERR and BIU_STAT.BIU_DSP_CMD<6:4> = WRITE BIU_STAT.BC_TCPERR and BIU_STAT.BIU_DSP_CMD<6:4> = WRITE Select ALL, at least one... Uncorrectable ECC error on a write from MBOX B-cache tag parity error on a write from MBOX B-cache tag control parity error on a write from MBOX BIU_STAT.FILL_ECC and not BIU_STAT.CRD and BIU_STAT.
Figure 8-3 Hard Error Parse Tree (Continued) A BIU_STAT.BIU_DSP_CMD<6:4>=Write LBER.NSES<18> and LBECR.CA<37:35> = Read and LBERC1.CID = This_CPU IMERR.ARBDROP<10> Else LBER.NSES<18> and LBERCR.CA<37:35> = Write and LBECR1.CID<10:7> = This_CPU Read ARB drop Inconsistent error (B-cache contains shared data) IMERR.ARBDROP<10> Write ARB drop Else Inconsistent error LBER.E<0> and LBECR.CA<37:35> = Read and LBECR1.CID<10:7> = This_CPU LBER.NXAE<12> (LSB problem getting data) Read LSB NXM LBER.
Figure 8-3 Hard Error Parse Tree (Continued) 1 2 A Continued LBER.O Else Previous system error latched Inconsistent BIU_STAT.BIU_DSP_CMD<6:4>=Write Unlock LBER.NSES<18> IMERR.ARBDROP<10> IMERR.BTAGPE<5> IMMER.
Figure 8-3 Hard Error Parse Tree (Continued) B LBER.NSES LMERR.ARBDROP or LMERR.ARBCOL Select ALL, at least one... Serious LEVI failure LMERR.PMAPPE<3:0> P-cache backmap parity error LMERR.BTAGPE B-cache tag parity error LMERR.BDATASBE C LMERR.BDATADBE D E LMERR.BMAPPE LMERR.BSTATPE None of the above... LBER.E LBER.SHE or LBER.DIE LBER.STE or LBER.CNFE or LBER.CAE LBER.TDE LBER.CTCE LBER.DTCE LBER.CE LBER.UCE LBER.CDPE None of the above... LBER.CE LBER.UCE None of the above...
Figure 8-3 Hard Error Parse Tree (Continued) 1 2 B Continued LBER.CPE2 LBER.CDPE2 LBER.CE2 LBER.UCE2 LBER.UCE and not LBER.TDE LBECR1.CA<37:35>=READ LBECR1.CID=THIS_LNP Otherwise... Otherwise... LBECR1.SHARED Otherwise... LBER.UCE and not LBER.TDE LBECR1.CA<37:35>=Read LBECR1.CID=This_CPU Otherwise... Otherwise... LBECR1.SHARED Otherwise... LBER.CDPE Any Adapter - LBER.E Set None of the Above...
Figure 8-3 Hard Error Parse Tree (Continued) 1 B Continued LBER.E<0> and LBECR1.CID=IOP_node (IOP is cmdr) IOP_LBER.STE<10> IOP_LBER.CAE<13> IOP_LBER.CNFE<11> IOP_LBECR1.CA<37:35>=Write IOP_LBER.NXAE<12> IOP_LBER.CPE<5> IOP_LBER.CE<3> IOP_LBER.UCE<1> Else Inconsistent IOP_LBERCR1.CA<37:35> = Read IOP_LBER.NXAE<12> IOP_LBER.CPE<5> IOP_LBER.CE<3> IOP_LBER.UCE<1> Else Inconsistent IOP_LBECR1.CA<37:35> = Wrt CSR IOP_LBER.NXAE<12> IOP_LBER.CPE<5> IOP.LBER.CE<3> IOP_LBER.
Figure 8-3 Hard Error Parse Tree (Continued) 1 2 B Continued IOP_LBER.CPE2<6> IOP_LBER.CDPE2<8> IOP_LBER.CE2<4> IOP_LBER.UCE2<2> Else IOP_LBER.
Figure 8-3 Hard Error Parse Tree (Continued) C LBECR1.CA<37:35> = Read and LBECR1.CID = not this node LBECR1.CA<37:35> = Write and LBECR1.CID<10:7> = This node Else LEVI read of B-cache correctable error from LSB request (dirty block) LEVI LSB write correctable error Inconsistent D LBECR1.CA<37:35> = Read and LBECR1.CID = not this node LBECR1.CA<37:35> = Write and LBECR1.
8.4 Soft Error Parse Tree Figure 8-4 Soft Error Parse Tree EXE$SERR ICR.LOCK ICSR.DPERR0 ICSR.TPERR0 ICSR.DPERR1 ICSR.TPERR1 None of the above... PCSTS.LOCK PCSTS.DPERR PCSTS.RIGHT_BANK PCSTS.LEFT_BANK Otherwise... BIU_STAT.LOST_WRITE_ERR PCSTS.PTE_ER_WR not PCSTS.PTE_ER_WR BIU_STAT.BIU_HERR and BIU_STAT.BIU_CMD = READ BIU_STAT.BIU_TPERR and BIU_STAT.BIU_CMD = READ Select ALL, at least one...
8.5 I/O Port Parse Tree Figure 8-5 IOP Parse Tree IPL 17 IOP IOP_LBER.NES<18> IPCNSE.MULT_INTR_ERR<20> IPCNSE.DN VRTX ERR<19> IPCNSE.UP VRTX ERR<18> IPCNSE.IPC IE<17> IPCNSE.UP_HIC_IE<16> Multiple interrupt error Down vortex error Up vortex error IPC internal error UP HIC internal error IPCNSE.UP_CHAN_PAR_ERROR_3<15> IPCNSE.UP_CHAN_PAR_ERROR_2<14> IPCNSE.UP_CHAN_PAR_ERROR_1<13> IPCNSE.
Figure 8-5 IOP Parse Tree (Continued) 1 2 IPL17 / IOP Continued IPCHST.C3_STAT_ERROR<12> IPCHST.C2_STAT_ERROR<8> IPCHST.C1_STAT_ERROR<4> IPCHST.C0_STAT_ERROR<0> IPCHST.C3_STAT_PWROK_TRANS<15> IPCHST.C2_STAT_PWROK_TRANS<11> IPCHST.C1_STAT_PWROK_TRANS<7> IPCHST.
8.6 DWLMA Parse Tree Figure 8-6 DWLMA Parse Tree IPL17 DWLMA XBER.NSES<12> LBERR.DHDPE<28> LBERR.MBPE<14> LBERR.MBIC<13> LBERR.MBIA<12> LBERR.DFDPE<6> LBERR.RBDPE<5> LBERR.MBOF<4> LBERR.FE<3> Else DOWN channel data parity error Mailbox parity error Mailbox illegal command Mailbox illegal address DOWN channel FIFO data parity error Read buffer data parity error Mailbox overflow DWLMA fatal error Inconsistent XBER.E<31> XBER.WEI<25> XBER.CC<27> XBER.IPE<24> XBER.CRD<19> XBER.
Figure 8-6 DWLMA Parse Tree (Continued) 1 2 XBER.TTO XBER.WDNAK<20> XBER.PE<23> Else Write data NO ACK parity error Write data NO ACK XBER.CNAK<15> XFAER.FCMD<31:28=Write> XBER.PE<23> Else CNAK on write Command NO ACK parity error Command NO ACK XBER.NRR<18> XBER.PE<23> Else Else No read response parity error No read response No XMI grant XBER.RIDNAK<21> XBER.PE<23> Else Read/IDENT data NO ACK parity error Read/IDENT data NO ACK XBER.WSE<22> XBER.PE<23> Else XBER.
Index A C AC input box, 5-5, 6-9 Addressing LSB, 2-3 VAXBI, 2-7 XMI, 2-6 AMR, 1-30 Cabinet control logic module, 5-5, 6-4 Cables, platform, 5-6 CCL, 5-5, 6-4 CCL pressure sensor, 5-5 Cdp command description, 3-2 example, 3-17 options, 3-4 syntax, 3-12 CHALT, 1-19 Clear command description, 3-2 syntax, 3-12 Clear EEPROM command, 3-4 Console commands, 3-2 command syntax, 3-12 special characters, 3-13 Continue command description, 3-2 syntax, 3-12 Controls and indicators, 6-1 Control panel, 5-3, 6-2 Fault l
D DC distribution box, 5-5 Deposit command description, 3-2 options, 3-5 syntax, 3-12 Device names, 3-11 Device types, 2-5 Diagnostics disk or tape drive, 4-10 remote node, 4-12 DIAG_CTL, 1-17 Disk brick control panel, 6-13 Disk plug-in unit, 5-3, 5-5, 6-13 field-replaceable units, 5-10 DWLMA module, 6-12 DWLMA parse tree, 8-23 DWLMA registers LSB, 1-40 XMI, 1-43 E ECR, 1-16 EEPROM, restoring corrupted, 7-2 Environment variables, 3-9 Examine command description, 3-2 options, 3-5 syntax, 3-12 E2044 module,
K KA7AA module, 6-6 KA7AA registers, 1-2 KA7AA specific registers, 1-6 L LBECR0-1, 1-5, 1-30 LBER, 1-3, 1-28 LBESR0-3, 1-4, 1-29 LCNR, 1-4, 1-29 LCNTR, 1-9 LCON, 1-9 LCPUMASK, 1-37 LDEV, 1-3, 1-28 LDIAG, 1-8, 1-40 LEDs, 6-1 LERR, 1-41 LEVR, 1-41 LFU, booting, 7-3 LFU commands Display, 7-5 Show, 7-5 Update, 7-6 LGPR, 1-42 LILID0-3, 1-36 LIOINTR, 1-5 LIPINTR, 1-5 LLOCK, 1-7 LMBPR, 1-37 LMERR, 1-7 LMISSADDR, 1-10 LMMR0-7, 1-4 LMODE, 1-6 LPERF, 1-9 LSB address mapping, 2-4 address space physical, 2-3 virtual,
hard error, 8-12 I/O port, 8-21 machine check, 8-5 soft error, 8-20 PCADR, 1-24 PCCTL, 1-25 PCSCR, 1-16 PCSTS, 1-25 Physical address space, 2-3 Plug-in units battery, 5-3, 5-5 disk, 5-3, 5-5 XMI, 5-3, 5-5 Power regulator, 5-3, 6-8 on LSB module, 6-7 Power regulators, XMI, 6-10 Processor module, 5-3, 6-6 R Registers CPU-specific, 1-6 DWLMA LSB, 1-40 DWLMA XMI, 1-43 Gbus, 1-26 IPRs, 1-11 I/O port, 1-35 KA7AA, 1-2 LSB required, 1-2 MS7AA, 1-27 VAXBI, 2-9 Removable media device, 5-5, 6-3 Repeat command descrip
TODR, 1-15 T2028 module, 6-12 U Update command description, 3-3 options, 3-8 syntax, 3-12 V VAXBI addresses, 2-7 node base addresses, 2-8 register address offsets, 2-9 VDATA, 1-20 Virtual address space, 2-3 VMAR, 1-19 VTAG, 1-19 X XBER, 1-44 XDEV, 1-43 XFADR, 1-45 XFAER, 1-45 XMI addresses, 2-6 XMI plug-in unit, 5-3, 5-5 field-replaceable units, 5-8 power regulators, 6-10 XMI registers, 1-43 Index-5
