Specifications

1–7 Hardware Mailbox Structure ................................ 1–23

1–8 Control Register Access Mailbox Header (CRAMH) ............... 1–25

1–9 Channel Request Block (CRB) . . . ............................ 1–26

1–10 Interrupt Transfer Vector Block (VEC)......................... 1–30

1–11 Device Data Block (DDB) ................................... 1–34

1–12 Driver Dispatch Table (DDT) ................................ 1–36

1–13 Driver Prologue Table (DPT) ................................ 1–38

1–14 Interrupt Dispatch Block (IDB) . . ............................ 1–42

1–15 I/O Request Packet (IRP) ................................... 1–44

1–16 I/O Request Packet Extension (IRPE) ......................... 1–50

1–17 Object Rights Block (ORB) .................................. 1–52

1–18 SCSI Class Driver Request Packet (SCDRP) . ................... 1–54

1–19 SCSI Connection Descriptor Table (SCDT). . . ................... 1–66

1–20 SCSI Port Descriptor Table (SPDT) ........................... 1–74

1–21 Spinlock Data Structure (SPL) . . . ............................ 1–81

1–22 Composition of Extended Unit Control Blocks ................... 1–84

1–23 Unit Control Block (UCB) .................................. 1–85

1–24 UCB Error-Log Extension .................................. 1–95

1–25 UCB Local Tape Extension ................................. 1–96

1–26 UCB Local Disk Extension .................................. 1–97

1–27 UCB Terminal Extension ................................... 1–99

2–1 SCSI Bus Phase Longword Returned to SPI$SENSE_PHASE ....... 2–90

2–2 SCSI Bus Phase Longword Supplied to SPI$SET_PHASE .......... 2–94

3–1 TURBOchannel Map Register Descriptor (TC_MD) ............... 3–74

3–2 VME Map Register Descriptor (VME_MD). . . ................... 3–78

Tables

1–1 Contents of Conﬁguration Control Block ....................... 1–4

1–2 Contents of Adapter Control Block............................ 1–7

1–3 Contents of Channel Control Block ........................... 1–12

1–4 Contents of Per-CPU Database . . ............................ 1–16

1–5 Contents of Control Register Access Mailbox . ................... 1–22

1–6 Contents of the Hardware Mailbox Structure ................... 1–24

1–7 Contents of the Control Register Access Mailbox Header........... 1–25

1–8 Contents of Channel Request Block ........................... 1–27

1–9 Contents of Interrupt Transfer Vector Block (VEC) ............... 1–30

1–10 Contents of Device Data Block . . . ............................ 1–35

1–11 Contents of Driver Dispatch Table ............................ 1–37

1–12 Contents of Driver Prologue Table ............................ 1–40

1–13 Contents of Interrupt Dispatch Block ......................... 1–43

1–14 Contents of an I/O Request Packet ........................... 1–45

1–15 Contents of the I/O Request Packet Extension ................... 1–51

1–16 Contents of Object Rights Block . . ............................ 1–53

1–17 Contents of SCSI Class Driver Request Packet .................. 1–58

1–18 Contents of SCSI Connection Descriptor Table .................. 1–68

1–19 Contents of SCSI Port Descriptor Table ........................ 1–77