Specifications

Data Structures
1.2 Adapter Control Block (ADP)
Table 1–2 (Cont.) Contents of Adapter Control Block
Field Name Contents
UNIBUS Adapter Extension
ADP$L_MR2QBL* Alternate-map-register wait queue’s backward link. IOC$ALOALTMAP,
IOC$REQALTMAP, and IOC$RELALTMAP read and write this field when
allocating and deallocating from the set of Q22–bus alternate map registers.
ADP$L_MR2ACTMDR* Number of active map register descriptors in arrays to which ADP$W_
MR2NREGAR and ADP$W_MR2FREGAR point. IOC$ALOALTMAP,
IOC$REQALTMAP, and IOC$RELMAPREG use these fields when allocating
and deallocating Q22–bus alternate map registers.
ADP$W_MR2NFENCE* Boundary marker for the array specified by ADP$W_MR2NREGAR; contains
–1.
ADP$W_MR2NREGAR* Alternate-map-register ‘‘number of registers’’ array of 124 words. The
number of words, or cells, that are active in this array is contained in
ADP$L_MR2ACTMDR. Each active cell gives a number of map registers in a
block of free alternate map registers. For each active cell in this array, there
is a corresponding first free map register number in the array specified by
ADP$W_MR2FREGAR. Together, these values give the base map register
and the number of free map registers for a block of free alternate map
registers. IOC$ALOALTMAP, IOC$REQALTMAP, and IOC$RELALTMAP
use this information when allocating and deallocating from Q22–bus
alternate map registers.
ADP$W_MR2FFENCE* Boundary marker for the array specified by ADP$W_MR2NREGAR; contains
–1.
ADP$W_MR2FREGAR* Alternate map register ‘‘first register’’ array of 124 words. The number
of words, or cells, that are active in this array is contained in ADP$L_
MR2ACTMDR. Each active cell gives the number of the first free map
register within a block of free map registers. For each active cell in this
array, there is a corresponding cell in the ‘‘number of registers’’ array,
ADP$W_MR2NREGAR. Together, these values give the base map register
and the number of free map registers for a block of free map registers.
ADP$W_UMR2_DIS* Number of disabled Q22–bus alternate map registers. During system
initialization, some map registers can be disabled so that their corresponding
Q22–bus addresses can be accessed directly through physical addresses.
ADP$L_MR2ADDR Address of the first Q22–bus alternate map register mapped in CPU node
private space. The value varies for each processor with alternate map
registers. IOC$LOADUBAMAP reads this field when accessing alternate
map registers.
ADP$L_VMEADP* VME adapter type identifier.
1–11