Specifications

Operating System Routines
IOC$REQMAPREG
IOC$REQMAPREG
Allocates sufficient UNIBUS map registers or a sufficient number of the first
496 Q22–bus map registers to accommodate a DMA transfer and, if unavailable,
places process in standard-map-register wait queue.
Module
IOSUBNPAG
Macro
REQMPR
Input
Location Contents
R5 Address of UCB
00(SP) Return PC of caller
04(SP) Return PC of caller’s caller
UCB$W_BCNT Transfer byte count
UCB$W_BOFF Byte offset in page
UCB$L_CRB Address of CRB
CRB$L_INTD+
VEC$L_ADP
Address of ADP
CRB$L_INTD+
VEC$W_MAPREG
VEC$V_MAPLOCK set indicates that map registers
have been permanently allocated to this controller
ADP$W_MRNREGARY,
ADP$W_MRFREGARY,
ADP$L_MRACTMDRS
Map register descriptor arrays
ADP$L_MRQBL Tail of queue of UCBs waiting for map registers
Output
Location Contents
R0 SS$_NORMAL
R1 Destroyed
R2 Address of ADP
CRB$L_INTD+
VEC$B_NUMREG
Number of map registers allocated
CRB$L_INTD+
VEC$W_MAPREG
Starting map register number
ADP$W_MRNREGARY,
ADP$W_MRFREGARY,
ADP$L_MRACTMDRS
Updated
3–135