Specifications

IRP (I/O request packet) (cont’d)
unlocking buffers specified in, 3–148
IRPE (I/O request packet extension), 1–47, 1–49
to 1–51, 3–94
address, 1–49
allocating, 1–49
deallocation, 1–50, 3–95, 3–148
unlocking buffers specified in, 3–95, 3–148
J
JIB$L_BYTCNT, 3–15, 3–21, 3–24, 3–26
JIB$L_BYTLM, 3–15, 3–21, 3–24, 3–26
JIB$V_BYTCNT_WAITERS, 3–21
JIB spinlock, 3–21, 3–24, 3–27
Job controller, 1–93
sending a message to, 3–60, 3–68
Job quota
byte count, 3–15, 3–21, 3–24, 3–26
byte limit, 3–15, 3–21, 3–24, 3–26
L
LDR$ALLOC_PT routine, 3–146
LDR$DEALLOC_PT routine, 3–147
LDR$GL_FREE_PT, 3–146, 3–147
LDR$GL_SPTBASE, 3–146, 3–147
LOADALT macro, 2–44, 3–96
LOADER$_PTE_NOT_EMPTY status, 3–147
LOADMBA macro, 2–45, 3–98
LOADUBA macro, 2–46, 3–101
Local disk UCB extension, 1–83, 1–97 to 1–98
required for error logging, 3–11
required for IOC$APPLYECC routine, 3–85
Local tape UCB extension, 1–83, 1–96 to 1–97
required for error logging, 3–11
Lock ID, 1–88
LOCK macro, 2–47, 3–150
Lock manager, 1–88
LOCK_SYSTEM_PAGES macro, 2–48
Logical I/O function
translation to physical function, 3–37, 3–47,
3–61
Longword access enable bit
See VEC$V_LWAE
Longword-aligned random-access mode, 1–32
Lookaside list
See Nonpaged pool
Loopback mode, 1–105
LWAE (longword access enable) bit
See VEC$V_LWAE
M
Macro
format, 2–1
Mailbox, 1–89, 1–91
associated with device, 1–92
buffered I/O quota for, 1–87
I/O function, 1–47
in shared memory, 1–93
marked for deletion, 1–93
permanent, 1–93
sending a message to, 3–59, 3–68
Mailbox I/O, 1–20 to 1–22, 2–51, 2–110, 3–19,
3–70, 3–88, 3–90
MAILBOX spinlock, 3–59, 3–68
Map registers, 1–8, 1–31, 1–32, 2–3
allocating, 3–75
allocating permanent, 1–31
byte offset bit, 3–101
loading, 2–46, 3–101
number of active, 1–9, 1–10
number of disabled, 1–10
of MBA, 2–45, 3–98
releasing, 2–56, 3–119
requesting, 2–61, 3–135
Map register wait queue, 1–9, 3–120, 3–136
MBA$INT, 4–25
MBA$L_BCR, 3–98
MBA$L_MAP, 3–98
MBA$L_VAR, 3–98
MBA (MASSBUS adapter)
registers
map, 2–45, 3–98
releasing secondary data channel, 3–121
Media ID, 1–95
Memory
See also Nonpaged pool
detecting parity errors in, 2–50
testing accessibility of, 2–39 to 2–40
MMG$IOLOCK routine, 3–38, 3–41, 3–48, 3–53,
3–62, 3–66
MMG$UNLOCK routine, 1–50, 3–148
MMG spinlock, 3–17, 3–146, 3–147, 3–148
Mount verification, 1–47, 1–93
Mount verification routine, 1–37, 1–38
Multilevel device interrupt dispatching, 1–28
Multiprocessor state, 1–16
Mutex
for ACL, 1–53
for I/O database, 4–6
Index–9