Specifications

N
Network device, 1–89
Nexus ID, 1–7
Node ID, 1–7
Non-direct-vector interrupt, 1–7, 1–31
Nonpaged pool, 1–20, 1–24, 3–16, 3–70
allocating, 3–14, 3–16, 3–26
deallocating, 3–5, 3–23
lookaside list, 3–15
O
Object
protection, 1–53
OPCOM process
sending a message to, 3–60, 3–68
Operator device, 1–88
ORB (object rights block), 1–51 to 1–54
address, 1–87
cloned, 4–7
Output device, 1–89
P
Page table entry
allocating, 3–146
deallocating, 3–147
modifying, 2–41
Paging I/O function, 1–47
PCA (pseudo CSR address), 1–7, 1–43, 3–19
PCB$L_PID, 3–87, 4–5
PCB$V_SSRWAIT, 3–14, 3–24, 3–26
PCB$W_ASTCNT, 3–6, 3–8, 3–12
PDT (port descriptor table), 1–95
Pending-I/O queue, 1–45, 1–91, 3–31, 3–32, 3–43,
3–44, 3–95, 3–132
bypassing, 3–18
length, 1–93, 3–32
Per-CPU database
See CPU
Performance
stack time, 1–17
Physical I/O function, 1–47, 3–94
PID (process identification number), 1–88
PIO map registers
for VME, 3–79, 3–105, 3–126
POOL spinlock, 3–16, 3–23
Poor man’s lockdown, 2–48 to 2–49, 2–102
Port
DMA buffer, 2–79 to 2–80
resetting, 2–86
Port command buffer
allocating, 2–69
deallocating, 2–73
Port driver entry vector table, 1–41
Port driver vector table, 1–104
address, 2–8
creating, 2–104, 2–105
defining entry in, 2–103
relocating, 2–7
PORT_MAINT initiate routine, 1–105
Power failure
occurring when device is busy, 1–92
Power failure recovery procedure, 1–31, 1–32,
1–88
PR$_SID processor register, 1–17
PR$_SIRR processor register, 2–67
Primary switch, 1–19
XMI callback, 1–9
Process
See also Process quota
current, 1–16
privilege mask, 1–49
Process I/O channel, 1–12, 1–46
deassigning, 4–4
reference count, 1–92, 1–93
validating, 3–142
Processor state
See Multiprocessor state
Processor status longword
See PSL
Processor subtype, 2–9
Processor type, 2–9
Process quota
charging, 1–47, 4–17
Pseudo CSR address
See PCA
PSL (processor status longword)
Z condition code, 3–31
PURDPR macro, 2–50, 3–112
Q
Q22–bus, 2–3
device interrupt dispatching, 1–28
Queue
releasing, 2–85
QUEUEAST spinlock, 3–9
Quota
See Process quota and Job quota
R
Random access device, 1–89
Read check
enabling, 1–89
Read function, 1–47, 1–48
postprocessing for, 3–94
READ_CSR macro, 2–51, 3–19
example, 2–51
Index–10