Data Sheet
MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 2 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
The following host interfaces are provided:
• Serial Peripheral Interface (SPI)
• Serial UART (similar to RS232 with voltage levels dependant on pin voltage supply)
• I
2
C-bus interface
3. Features and benefits
Highly integrated analog circuitry to demodulate and decode responses
Buffered output drivers for connecting an antenna with the minimum number of
external components
Supports ISO/IEC 14443 A/MIFARE and NTAG
Typical operating distance in Read/Write mode up to 50 mm depending on the
antenna size and tuning
Supports MF1xxS20, MF1xxS70 and MF1xxS50 encryption in Read/Write mode
Supports ISO/IEC 14443 A higher transfer speed communication up to 848 kBd
Supports MFIN/MFOUT
Additional internal power supply to the smart card IC connected via MFIN/MFOUT
Supported host interfaces
SPI up to 10 Mbit/s
I
2
C-bus interface up to 400 kBd in Fast mode, up to 3400 kBd in High-speed mode
RS232 Serial UART up to 1228.8 kBd, with voltage levels dependant on pin
voltage supply
FIFO buffer handles 64 byte send and receive
Flexible interrupt modes
Hard reset with low power function
Power-down by software mode
Programmable timer
Internal oscillator for connection to 27.12 MHz quartz crystal
2.5 V to 3.3 V power supply
CRC coprocessor
Programmable I/O pins
Internal self-test
4. Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
analog supply voltage V
DD(PVDD)
V
DDA
= V
DDD
= V
DD(TVDD)
;
V
SSA
=V
SSD
=V
SS(PVSS)
=V
SS(TVSS)
=0V
[1][2]
2.5 3.3 3.6 V
V
DDD
digital supply voltage 2.5 3.3 3.6 V
V
DD(TVDD)
TVDD supply voltage 2.5 3.3 3.6 V
V
DD(PVDD)
PVDD supply voltage
[3]
1.6 1.8 3.6 V
V
DD(SVDD)
SVDD supply voltage V
SSA
=V
SSD
=V
SS(PVSS)
=V
SS(TVSS)
= 0 V 1.6 - 3.6 V