Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 58 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
9.3.3.3 Reserved register 23h
Functionality is reserved for future use.
9.3.3.4 ModWidthReg register
Sets the modulation width.
9.3.3.5 Reserved register 25h
Functionality is reserved for future use.
Table 91. Reserved register (address 23h); reset value: 88h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol reserved
Access -
Table 92. Reserved register bit descriptions
Bit Symbol Description
7 to 0 reserved reserved for future use
Table 93. ModWidthReg register (address 24h); reset value: 26h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol ModWidth[7:0]
Access R/W
Table 94. ModWidthReg register bit descriptions
Bit Symbol Description
7 to 0 ModWidth[7:0] defines the width of the Miller modulation as multiples of the carrier
frequency (ModWidth + 1 / f
clk
)
the maximum value is half the bit period
Table 95. Reserved register (address 25h); reset value: 87h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol reserved
Access -
Table 96. Reserved register bit descriptions
Bit Symbol Description
7 to 0 reserved reserved for future use