Data Sheet

MFRC522 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.9 — 27 April 2016
112139 61 of 95
NXP Semiconductors
MFRC522
Standard performance MIFARE and NTAG frontend
Table 106. TModeReg register bit descriptions
Bit Symbol Value Description
7 TAuto 1 timer starts automatically at the end of the transmission in
all communication modes at all speeds
if the RxModeReg register’s RxMultiple bit is not set, the
timer stops immediately after receiving the 5th bit (1 start
bit, 4 data bits)
if the RxMultiple bit is set to logic 1 the timer never stops, in
which case the timer can be stopped by setting the
ControlReg register’s TStopNow bit to logic 1
0 indicates that the timer is not influenced by the protocol
6 to 5 TGated[1:0] internal timer is running in gated mode
Remark: in gated mode, the Status1Reg register’s
TRunning bit is logic 1 when the timer is enabled by the
TModeReg register’s TGated[1:0] bits
this bit does not influence the gating signal
00 non-gated mode
01 gated by pin MFIN
10 gated by pin AUX1
11 -
4 TAutoRestart 1 timer automatically restarts its count-down from the 16-bit
timer reload value instead of counting down to zero
0 timer decrements to 0 and the ComIrqReg register’s
TimerIRq bit is set to logic 1
3 to 0 TPrescaler_Hi[3:0] - defines the higher 4 bits of the TPrescaler value
The following formula is used to calculate the timer
frequency if the DemodReg register’s TPrescalEven bit in
Demot Regis set to logic 0:
f
timer
= 13.56 MHz / (2*TPreScaler+1).
Where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo]
(TPrescaler value on 12 bits) (Default TPrescalEven
bit is logic 0)
The following formula is used to calculate the timer
frequency if the DemodReg register’s TPrescalEven bit is
set to logic 1:
f
timer
= 13.56 MHz / (2*TPreScaler+2).
See Section 8.5 “
Timer unit”.
Table 107. TPrescalerReg register (address 2Bh); reset value: 00h bit allocation
Bit 7 6 5 4 3 2 1 0
Symbol TPrescaler_Lo[7:0]
Access R/W