Product Info

Smart LTE Module Series
SC20 Hardware Design
SC20_Hardware_Design Confidential / Released
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3.19.3. Design Considerations
 Special attention should be paid to the definition of video device interface in schematic design.
Different video devices will have varied definitions for their corresponding connectors. Assure the
device and the connectors are correctly connected.
 MIPI are high speed signal lines, supporting maximum data rate up to 1.5Gbps. The differential
impedance should be controlled as 100Ω. Additionally, it is recommended to route the trace on the
inner layer of PCB, and do not cross it with other traces. For the same video device, all the MIPI
traces should keep the same length. In order to avoid crosstalk, a distance of 1.5 times of the trace
width is recommended to be maintained among MIPI signal lines. During impedance matching, do
not connect GND on different planes so as to ensure impedance consistency.
 It is recommended to select a low capacitance TVS for ESD protection and the recommended
parasitic capacitance is below 1pF.
 Route MIPI traces according to the following rules:
a) The total trace length should not exceed 305mm;
b) Control the differential impedance as 100Ω±10%;
c) Control intra-lane length difference within 0.67mm;
d) Control inter-lane length difference within 1.3mm.
Table 24: MIPI Trace Length Inside the Module
PIN
Pin Name
Length (mm)
Length Difference (P-N)
52
MIPI_DSI_CLKN
7.08
-0.63
53
MIPI_DSI_CLKP
6.45
54
MIPI_DSI_LN0N
6.15
-0.30
55
MIPI_DSI_LN0P
5.85
56
MIPI_DSI_LN1N
6.64
-0.04
57
MIPI_DSI_LN1P
6.60
58
MIPI_DSI_LN2N
8.20
0.74
59
MIPI_DSI_LN2P
8.94
60
MIPI_DSI_LN3N
9.28
0.96
61
MIPI_DSI_LN3P
10.24
63
MIPI_CSI0_CLKN
10.55
0.54
64
MIPI_CSI0_CLKP
11.09