Product guide

Description
XAPP1178 (v2.0) January 23, 2015 www.xilinx.com 10
Initialization
In the first stage, from the Vivado tools exported hardware parameter definition file
(xparameters.h), the application finds if the hardware design has MST enabled or not. The
application executes the corresponding sub-routines.
The DisplayPort source core is set up and initialized in the following sequence.
1. Keep the physical layer (PHY) in reset.
2. Disable transmitter.
3. Set clock divider.
4. Set DisplayPort clock speed.
5. Bring the PHY out of reset.
6. Wait for PHY to be ready.
7. Enable transmitter.
8. Enable the interrupt mask for HPD.
HPD Event Handling
There are two types of HPD events that can occur. One is a connection/disconnection event and
the other is the pulse detection event. The interrupt handler in the application determines the
kind of interrupt by reading the INTERRUPT_STATUS register and INTERRUPT_MASK registers.
The main handler will then arbitrate accordingly for HPD events and HPD pulses to their
respective handlers as determined by the application. On detecting a hot-plug event, the
software initiates link training. When a hot-unplug event is detected, the main link is disabled
and the software continues to poll the registers for any change in HPD status. On an occurrence
of the HPD interrupt, the link status is checked and retraining is performed, if required. Upon
detection of any HPD event, the interrupts are masked while the corresponding event handler
function is being run.
Upon plugging the sink device or on an HPD interrupt, the source core starts to check the link
status and re-train it if necessary with the preserved user configured link rate and lane count
values. Video displayed with the preserved user selected resolution, patterns, and BPC values
before the HPD event happened. The video timing format is determined by checking the
capability of the sink device through a DisplayPort Configuration Data (DPCD) read.
Link Training
Refer to the "Link Training" section under "Designing with core" in the LogiCORE IP DisplayPort
Product Guide (PG064) [Ref 4] for detailed steps on link training. On the successful link training,
the main link is enabled.