Product guide

Description
XAPP1178 (v2.0) January 23, 2015 www.xilinx.com 4
• sst: This folder contains the hw and sw sub directories for SST mode operation. The hw
directory contains the mst.tcl file that can be sourced from the Vivado design tools to
create the bitstream. The sw directory contains the already exported software project
workspace that can be opened using SDK. This workspace will have an exported hardware
definition file, board support package created with a local DP drivers repository, and
source code to test the DP design.
Description
The reference design includes the following features:
• Designed with the VESA DisplayPort Specification v1.2
• Dynamic, switchable lane rates: 1.62, 2.7 or 5.4 Gb/s
• Variable lanes: 1, 2 or 4 lanes
•A wide range of resolutions
• Flexibility to change the source patterns
• Flexibility to change the bits per color
• Displaying Extended Display Identification Data (EDID), DisplayPort Configuration Data
(DPCD), Main Stream Attributes (MSA) values of TX for debugging, options for reading
auxiliary interface registers, and reading of link configuration registers to know the link and
lane status.