Specifications

8 Electrical alignments
57MG2.1E
8 Electrical alignments
8.1 General alignment conditions
All electrical alignments should be made under the following
conditions:
– Power supply voltage: 220-240V ± 10%; 50-60 Hz ± 5%.
– Warm-up time >10 minutes.
– Voltages and oscillograms are measured in relation to
tuner earth (with exception to the voltages on the primary
side of the power supply). Never use the cooling fins/plates
as ground.
– Test probe: Ri > 10 MOHM, Ci < 20 pF.
8.2 Alignments on the large signal panel (LSP)
8.2.1 +141V (VBAT) supply voltage
– Connect a voltmeter across C2569 (diagram A1, +VBAT).
– Switch on the set.
– Using potentiometer R3559 (diagram A1) adjust the VBAT
supply voltage to +141V ± 0V5. (see Fig. 8.1)
Figure 8-1
8.2.2 Focusing
– Tune the set to a cross hatch test-pattern.
– Adjust the focus potentiometer (diagram A1, upper knob on
the LOT) for an overall optimum focusing of the picture.
8.2.3 Vg2 adjustment
Elucidation: In the frame blanking period of the R, G and B
signals applied to the CRT, alternately per frame two
measuring pulses with different DC levels are inserted by the
"HOP" video processor IC7300. During the first frame flyback a
pulse is inserted used as reference for the Vg2 adjustment and
in the next frame flyback a second pulse is inserted used as
reference for the internal white "D" adjustment. For the Vg2
adjustment the pulse with the highest DC-level is used.
– Put the set in the SDM mode (via the >-button on the DST,
or via short circuiting the SDM pins 2 and 3 of connector
0356 on the SSP (diagram K7).
– Insert a black test-pattern signal (carrier 475.25 MHz) to
the tuner input.
– Connect an oscilloscope (position 50V/Div DC and 2ms/
Div) alternately to the CRT cathodes (red pin 8, green pin
6, blue pin 11) and measure for each cathode the DC level
of the measuring pulse (see elucidation above and Fig. 8.2)
and write down each value. Remark: Trigger the scope
external via a CVBS signal (for instance via pin 19 of the
scart1 connection).
– Adjust the Vg2 potentiometer (diagram A1, lower knob on
the LOT) so that the measuring pulse with the highest
noted level is on 160V level.
Figure 8-2
8.3 Alignments on the small signal panel (SSP)
8.3.1 40.4 MHz neighbour-channel sound trap
– Tune to a checker board test-pattern (system BG - and with
a carrier frequency of 475.25 MHz).
– Connect an oscilloscope (trigger line frequent) to pin 19
(CVBS out) of the scart1 connection.
– Align the coil L5103 (diagram K1) completely downwards
(see Fig. 8.3).
– Align the coil upwards till under- and overshoot arise at the
black/white and white/black transitions in the video signal
(Fig. 8.4).
– Align the coil downwards again till above mentioned under-
and overshoot is just disappeared.
Figure 8-3
CL 86532057_004b.AI
240798
3559
+V BAT
LSP
Focus
Screen
VG2
LOT
MEASURING PULSE 1
CL 86532092_012.eps
031198
MEASURING PULSE 2
Vco
10ms
0V
ADJUST
LEVEL
CL 86532057_004a.AI
240798
1
2
3
0356
SAM
SDM
L5103
40.4 MHz
ALIGNMENT
SSP
Tuner