User guide

13–8 Chapter 13: Color Space Converter MegaCore Function
Control Register Maps
Video and Image Processing Suite January 2013 Altera Corporation
User Guide
Control Register Maps
Table 13–6 describes the control register map for the Color Space Converter MegaCore
function.
The width of each register in the Color Space Converter control register map is 32 bits.
The coefficient and summand registers use integer, signed 2’s complement numbers.
To convert from fractional values, simply move the binary point right by the number
of fractional bits specified in the user interface.
The control data is read once at the start of each frame and is buffered inside the
MegaCore function, so the registers can be safely updated during the processing of a
frame.
Table 13–6. Color Space Converter Control Register Map
Address Register Name Description
0
Control
Bit 0 of this register is the Go bit, all other bits are unused. Setting this bit to 0 causes
the Color Space Converter MegaCore function to stop the next time control information
is read. Refer to “Avalon-MM Slave Interfaces” on page 3–17 for full details.
1
Status
Bit 0 of this register is the Status bit, all other bits are unused. Refer to “Avalon-MM
Slave Interfaces” on page 3–17 for full details.
2
Coefficient A0
For more information, refer to “Color Space Conversion” on page 13–1.
3
Coefficient B0
4 Coefficient C0
5 Coefficient A1
6 Coefficient B1
7 Coefficient C1
8 Coefficient A2
9 Coefficient B2
10 Coefficient C2
11 Summand S0
12 Summand S1
13 Summand S2