User guide
Table Of Contents
- Contents
- 1. About This MegaCore Function Suite
- Release Information
- Device Family Support
- Features
- Design Example
- Performance and Resource Utilization
- 2D FIR Filter
- 2D Median Filter
- Alpha Blending Mixer
- Avalon-ST Video Monitor
- Chroma Resampler
- Clipper
- Clocked Video Input
- Clocked Video Output
- Color Plane Sequencer
- Color Space Converter
- Control Synchronizer
- Deinterlacer
- Deinterlacer II
- Frame Buffer
- Gamma Corrector
- Interlacer
- Scaler
- Scaler II
- Switch
- Test Pattern Generator
- Trace System
- 2. Getting Started with Altera IP Cores
- 3. Interfaces
- Interface Types
- Avalon-ST Video Protocol
- Avalon-MM Slave Interfaces
- Avalon-MM Master Interfaces
- Buffering of Non-Image Data Packets in Memory
- 4. 2D FIR Filter MegaCore Function
- 5. 2D Median Filter MegaCore Function
- 6. Alpha Blending MegaCore Function
- 7. Avalon-ST Video Monitor MegaCore Function
- 8. Chroma Resampler MegaCore Function
- 9. Clipper MegaCore Function
- 10. Clocked Video Input MegaCore Function
- 11. Clocked Video Output MegaCore Function
- 12. Color Plane Sequencer MegaCore Function
- 13. Color Space Converter MegaCore Function
- 14. Control Synchronizer MegaCore Function
- 15. Deinterlacer MegaCore Function
- Core Overview
- Functional Description
- Parameter Settings
- Signals
- Control Register Maps
- 16. Deinterlacer II MegaCore Function
- 17. Frame Reader MegaCore Function
- 18. Frame Buffer MegaCore Function
- 19. Gamma Corrector MegaCore Function
- 20. Interlacer MegaCore Function
- 21. Scaler MegaCore Function
- 22. Scaler II MegaCore Function
- 23. Switch MegaCore Function
- 24. Test Pattern Generator MegaCore Function
- 25. Trace System MegaCore Function
- A. Avalon-ST Video Verification IP Suite
- B. Choosing the Correct Deinterlacer
- Additional Information

Chapter 1: About This MegaCore Function Suite 1–5
Performance and Resource Utilization
January 2013 Altera Corporation Video and Image Processing Suite
User Guide
Performance and Resource Utilization
This section shows typical expected performance for the Video and Image Processing
Suite MegaCore functions with the Quartus
®
II software targeting Cyclone IV GX and
Stratix V devices.
1 Cyclone IV GX devices use combinational look-up tables (LUTs) and logic registers;
Stratix V devices use combinational adaptive look-up tables (ALUTs) and logic
registers.
2D FIR Filter
Table 1–4 lists the performance figures for the 2D FIR Filter.
2D Median Filter
Table 1–5 lists the performance figures for the 2D Median Filter.
Table 1–4. 2D FIR Filter Performance
Device Family
Combinational
LUTs/ALUTs
Logic
Registers
Memory DSP Blocks
f
MAX
(MHz)
Bits M9K M20K (9×9) (18×18)
Edge detecting 3×3 asymmetric filter, working on 352×288 8-bit R’G’B’, using 3 bit coefficients.
Cyclone IV GX
(1)
984 1,341 16,896 4 — 9 — 207.9
Stratix V
(2)
777 987 16,896 — 2 — 9 302.48
Smoothing 3×3 symmetric filter, working on 640×480 8-bit R’G’B’, using 9 bit coefficients.
Cyclone IV GX
(1)
986 1,313 30,720 4 — 6 — 205
Stratix V
(2)
771 958 30,720 — 2 — 3 326.9
Sharpening 5×5 symmetric filter, working on 640×480 in 8-bit R’G’B’, using 9 bit coefficients.
Cyclone IV GX
(1)
1,894 2,412 61,440 8 — 12 — 197.36
Stratix V
(2)
1,424 1,804 61,440 — 4 — 6 290.36
Smoothing 7×7 symmetric filter, working on 1,280×720 in 10-bit R’G’B’, using 15 bit coefficients.
Cyclone IV GX
(1)
3,725 4,681 230,400 30 — 20 — 178.25
Stratix V
(2)
2,648 3,612 230,400 — 12 — 10 239.58
Notes to Table 1–4:
(1) EP4CGX22BF14C6 devices.
(2) EP4CGX22BF14C6 devices.
Table 1–5. 2D Median Filter Performance (Part 1 of 2)
Device Family
Combinational
LUTs/ALUTs
Logic
Registers
Memory DSP Blocks
f
MAX
(MHz)
Bits M9K M20K (9×9) (18×18)
3×3 median filtering HDTV 720 pixel monochrome video.
Cyclone IV GX
(1)
1,567 1,724 25,600 6 — — — 245.64
Stratix V
(2)
1,011 1,200 25,600 — 2 — — 353.61
Median filtering 64×64 pixel R’G’B frames using a 3×3 kernel of pixels.
Cyclone IV GX
(1)
1,529 1,674 3,072 2 — — — 272.78