User guide

Chapter 15: Deinterlacer MegaCore Function 15–15
Control Register Maps
January 2013 Altera Corporation Video and Image Processing Suite
User Guide
Control Register Maps
An run-time control interface can be attached to the Deinterlacer that you can use to
override the default behavior of the motion-adaptive algorithm or to synchronize the
input and output frame rates. However, it is not possible to enable both interfaces
simultaneously.
Table 15–5 describes the control register map that controls the motion-adaptive
algorithm at run time. The control data is read once and registered before outputting a
frame. It can be safely updated during the processing of a frame.
write_master_av_writedata Out
write_master port Avalon-MM writedata bus. These
output lines carry data for write transfers.
(1)
,
(3)
Notes to Table 15–4:
(1) The signals associated with the write_master and read_master ports are present only when buffering is used.
(2) When you select Motion Adaptive algorithm, two read master interfaces are used.
(3) When you select Motion Adaptive algorithm and turn on Motion bleed, one additional read master (
motion_read_master ) and one additional
write master (
motion_write_master ) port are used to read and update motion values.
(4) Additional clock and reset signals are available when you turn on Use separate clocks for the Avalon-MM master interfaces.
(5) The signals associated with the
ma_control port are not present unless you turn on Run-time control of the motion-adaptive blending.
(6) The signals associated with the
ker_writer_control port are not present unless you turn on Run-time control for locked frame rate
conversion.
Table 15–4. Deinterlacer Signals (Part 4 of 4)
Signal Direction Description
Table 15–5. Deinterlacer Control Register Map for Run-Time Control of the Motion-Adaptive Algorithm
Address Register Description
0
Control
Bit 0 of this register is the Go bit, all other bits are unused. Setting this bit to 0 causes the
Deinterlacer MegaCore function to stop before control information is read and before
outputting a frame. While stopped, the Deinterlacer may continue to receive and drop
frames at its input if triple-buffering is enabled. Refer to “Avalon-MM Slave Interfaces” on
page 3–17 for full details.
1
Status
Bit 0 of this register is the Status bit, all other bits are unused. Refer to “Avalon-MM
Slave Interfaces” on page 3–17 for full details.
2
Motion value
override
Write-only register. Bit 0 of this register must be set to 1 to override the per-pixel motion
value computed by the deinterlacing algorithm with a user specified value. This register
cannot be read.
3
Blending
coefficient
Write-only register. The 16-bit value that overrides the motion value computed by the
deinterlacing algorithm. This value can vary between 0 (weaving) to 65535 (bobbing).
The register cannot be read.