User guide
Table Of Contents
- Contents
- 1. About This MegaCore Function Suite
- Release Information
- Device Family Support
- Features
- Design Example
- Performance and Resource Utilization
- 2D FIR Filter
- 2D Median Filter
- Alpha Blending Mixer
- Avalon-ST Video Monitor
- Chroma Resampler
- Clipper
- Clocked Video Input
- Clocked Video Output
- Color Plane Sequencer
- Color Space Converter
- Control Synchronizer
- Deinterlacer
- Deinterlacer II
- Frame Buffer
- Gamma Corrector
- Interlacer
- Scaler
- Scaler II
- Switch
- Test Pattern Generator
- Trace System
- 2. Getting Started with Altera IP Cores
- 3. Interfaces
- Interface Types
- Avalon-ST Video Protocol
- Avalon-MM Slave Interfaces
- Avalon-MM Master Interfaces
- Buffering of Non-Image Data Packets in Memory
- 4. 2D FIR Filter MegaCore Function
- 5. 2D Median Filter MegaCore Function
- 6. Alpha Blending MegaCore Function
- 7. Avalon-ST Video Monitor MegaCore Function
- 8. Chroma Resampler MegaCore Function
- 9. Clipper MegaCore Function
- 10. Clocked Video Input MegaCore Function
- 11. Clocked Video Output MegaCore Function
- 12. Color Plane Sequencer MegaCore Function
- 13. Color Space Converter MegaCore Function
- 14. Control Synchronizer MegaCore Function
- 15. Deinterlacer MegaCore Function
- Core Overview
- Functional Description
- Parameter Settings
- Signals
- Control Register Maps
- 16. Deinterlacer II MegaCore Function
- 17. Frame Reader MegaCore Function
- 18. Frame Buffer MegaCore Function
- 19. Gamma Corrector MegaCore Function
- 20. Interlacer MegaCore Function
- 21. Scaler MegaCore Function
- 22. Scaler II MegaCore Function
- 23. Switch MegaCore Function
- 24. Test Pattern Generator MegaCore Function
- 25. Trace System MegaCore Function
- A. Avalon-ST Video Verification IP Suite
- B. Choosing the Correct Deinterlacer
- Additional Information

January 2013 Altera Corporation Video and Image Processing Suite
User Guide
2. Getting Started with Altera IP Cores
This chapter provides a general overview of the Altera IP core design flow to help you
quickly get started with any Altera IP core. The Altera IP Library is installed as part of
the Quartus II installation process. You can select and parameterize any Altera IP core
from the library. Altera provides an integrated parameter editor that allows you to
customize IP cores to support a wide variety of applications. The parameter editor
guides you through the setting of parameter values and selection of optional ports.
The following sections describe the general design flow and use of Altera IP cores.
Installation and Licensing
The Altera IP Library is distributed with the Quartus II software and downloadable
from the Altera website (www.altera.com).
Figure 2–1 shows the directory structure after you install an Altera IP core, where
<
path
>
is the installation directory. The default installation directory on Windows is
C:\altera\<version number>; on Linux it is /opt/altera<version number>.
You can evaluate an IP core in simulation and in hardware until you are satisfied with
its functionality and performance. Some IP cores require that you purchase a license
for the IP core when you want to take your design to production. After you purchase
a license for an Altera IP core, you can request a license file from the Altera Licensing
page of the Altera website and install the license on your computer. For additional
information, refer to Altera Software Installation and Licensing.
Figure 2–1. IP core Directory Structure
<path>
Installation directory
ip
Contains the Altera IP Library and third-party IP cores
altera
Contains the Altera IP Library
alt_mem_if
Contains the UniPHY IP core files