User guide
Table Of Contents
- Contents
- 1. About This MegaCore Function Suite
- Release Information
- Device Family Support
- Features
- Design Example
- Performance and Resource Utilization
- 2D FIR Filter
- 2D Median Filter
- Alpha Blending Mixer
- Avalon-ST Video Monitor
- Chroma Resampler
- Clipper
- Clocked Video Input
- Clocked Video Output
- Color Plane Sequencer
- Color Space Converter
- Control Synchronizer
- Deinterlacer
- Deinterlacer II
- Frame Buffer
- Gamma Corrector
- Interlacer
- Scaler
- Scaler II
- Switch
- Test Pattern Generator
- Trace System
- 2. Getting Started with Altera IP Cores
- 3. Interfaces
- Interface Types
- Avalon-ST Video Protocol
- Avalon-MM Slave Interfaces
- Avalon-MM Master Interfaces
- Buffering of Non-Image Data Packets in Memory
- 4. 2D FIR Filter MegaCore Function
- 5. 2D Median Filter MegaCore Function
- 6. Alpha Blending MegaCore Function
- 7. Avalon-ST Video Monitor MegaCore Function
- 8. Chroma Resampler MegaCore Function
- 9. Clipper MegaCore Function
- 10. Clocked Video Input MegaCore Function
- 11. Clocked Video Output MegaCore Function
- 12. Color Plane Sequencer MegaCore Function
- 13. Color Space Converter MegaCore Function
- 14. Control Synchronizer MegaCore Function
- 15. Deinterlacer MegaCore Function
- Core Overview
- Functional Description
- Parameter Settings
- Signals
- Control Register Maps
- 16. Deinterlacer II MegaCore Function
- 17. Frame Reader MegaCore Function
- 18. Frame Buffer MegaCore Function
- 19. Gamma Corrector MegaCore Function
- 20. Interlacer MegaCore Function
- 21. Scaler MegaCore Function
- 22. Scaler II MegaCore Function
- 23. Switch MegaCore Function
- 24. Test Pattern Generator MegaCore Function
- 25. Trace System MegaCore Function
- A. Avalon-ST Video Verification IP Suite
- B. Choosing the Correct Deinterlacer
- Additional Information

2–2 Chapter 2: Getting Started with Altera IP Cores
Design Flows
Video and Image Processing Suite January 2013 Altera Corporation
User Guide
Design Flows
You can use the following flow(s) to parameterize Altera IP cores:
■ MegaWizard Plug-In Manager Flow
The MegaWizard Plug-In Manager flow offers the following advantages:
■ Allows you to parameterize an IP core variant and instantiate into an existing
design
■ For some IP cores, this flow generates a complete example design and testbench.
MegaWizard Plug-In Manager Flow
The MegaWizard Plug-In Manager flow allows you to customize your IP core and
manually integrate the function into your design.
Specifying Parameters
To specify IP core parameters with the MegaWizard Plug-In Manager, follow these
steps:
Figure 2–2. Design Flows
(1)
Note to Figure 2–2:
(1) Altera IP cores may or may not support the Qsys and SOPC Builder design flows.
Select Design Flow
Specify Parameters
Qsys or
SOPC Builder
Flow
MegaWizard
Flow
Complete Qsys or
SOPC Builder System
Specify Parameters
IP Complete
Perform
Functional Simulation
Debug Design
Does
Simulation Give
Expected Results?
Yes
Optional
Add Constraints
and Compile Design