User guide

Chapter 2: Getting Started with Altera IP Cores 2–3
MegaWizard Plug-In Manager Flow
January 2013 Altera Corporation Video and Image Processing Suite
User Guide
1. Create a Quartus II project using the New Project Wizard available from the File
menu.
2. In the Quartus II software, launch the MegaWizard Plug-in Manager from the
Tools menu, and follow the prompts in the MegaWizard Plug-In Manager
interface to create or edit a custom IP core variation.
3. To select a specific Altera IP core, click the IP core in the Installed Plug-Ins list in
the MegaWizard Plug-In Manager.
4. Specify the parameters on the Parameter Settings pages. For detailed explanations
of these parameters, refer to the “Parameter Settings” section of the respective
MegaCore Function chapter in this user guide or the “Documentation” button in the
MegaWizard parameter editor.
1 Some IP cores provide preset parameters for specific applications. If you
wish to use preset parameters, click the arrow to expand the Presets list,
select the desired preset, and then click Apply.
5. If the IP core provides a simulation model, specify appropriate options in the
wizard to generate a simulation model.
1 Altera IP supports a variety of simulation models, including
simulation-specific IP functional simulation models and encrypted RTL
models, and plain text RTL models. These are all cycle-accurate models. The
models allow for fast functional simulation of your IP core instance using
industry-standard VHDL or Verilog HDL simulators. For some cores, only
the plain text RTL model is generated, and you can simulate that model.
f For more information about functional simulation models for Altera IP
cores, refer to Simulating Altera Designs in volume 3 of the Quartus II
Handbook.
c Use the simulation models only for simulation and not for synthesis or any
other purposes. Using these models for synthesis creates a nonfunctional
design.
6. If the parameter editor includes EDA and Summary tabs, follow these steps:
a. Some third-party synthesis tools can use a netlist that contains the structure of
an IP core but no detailed logic to optimize timing and performance of the
design containing it. To use this feature if your synthesis tool and IP core
support it, turn on Generate netlist.
b. On the Summary tab, if available, select the files you want to generate. A gray
checkmark indicates a file that is automatically generated. All other files are
optional.
1 If file selection is supported for your IP core, after you generate the core, a
generation report (<variation name>.html) appears in your project directory.
This file contains information about the generated files.
7. Click the Finish button, the parameter editor generates the top-level HDL code for
your IP core, and a simulation directory which includes files for simulation.