User guide
Table Of Contents
- Contents
- 1. About This MegaCore Function Suite
- Release Information
- Device Family Support
- Features
- Design Example
- Performance and Resource Utilization
- 2D FIR Filter
- 2D Median Filter
- Alpha Blending Mixer
- Avalon-ST Video Monitor
- Chroma Resampler
- Clipper
- Clocked Video Input
- Clocked Video Output
- Color Plane Sequencer
- Color Space Converter
- Control Synchronizer
- Deinterlacer
- Deinterlacer II
- Frame Buffer
- Gamma Corrector
- Interlacer
- Scaler
- Scaler II
- Switch
- Test Pattern Generator
- Trace System
- 2. Getting Started with Altera IP Cores
- 3. Interfaces
- Interface Types
- Avalon-ST Video Protocol
- Avalon-MM Slave Interfaces
- Avalon-MM Master Interfaces
- Buffering of Non-Image Data Packets in Memory
- 4. 2D FIR Filter MegaCore Function
- 5. 2D Median Filter MegaCore Function
- 6. Alpha Blending MegaCore Function
- 7. Avalon-ST Video Monitor MegaCore Function
- 8. Chroma Resampler MegaCore Function
- 9. Clipper MegaCore Function
- 10. Clocked Video Input MegaCore Function
- 11. Clocked Video Output MegaCore Function
- 12. Color Plane Sequencer MegaCore Function
- 13. Color Space Converter MegaCore Function
- 14. Control Synchronizer MegaCore Function
- 15. Deinterlacer MegaCore Function
- Core Overview
- Functional Description
- Parameter Settings
- Signals
- Control Register Maps
- 16. Deinterlacer II MegaCore Function
- 17. Frame Reader MegaCore Function
- 18. Frame Buffer MegaCore Function
- 19. Gamma Corrector MegaCore Function
- 20. Interlacer MegaCore Function
- 21. Scaler MegaCore Function
- 22. Scaler II MegaCore Function
- 23. Switch MegaCore Function
- 24. Test Pattern Generator MegaCore Function
- 25. Trace System MegaCore Function
- A. Avalon-ST Video Verification IP Suite
- B. Choosing the Correct Deinterlacer
- Additional Information

Chapter 3: Interfaces 3–15
Avalon-ST Video Protocol
January 2013 Altera Corporation Video and Image Processing Suite
User Guide
Example 2 (Data Transferred in Sequence)
This example shows how a number of pixels from the middle of a frame could be
processed by another MegaCore function. This time handling a color pattern that has
planes B'G'R' in sequence. This example does not show the start of packet and end of
packet signals because these are always low during the middle of a packet.
The bits per pixel per color plane and color pattern are listed in Table 3–9.
Figure 3–13 shows how a number of pixels from the middle of a frame are processed.
This example is similar to Figure 3–12 on page 3–13 except that it is configured to
accept data in sequence rather than parallel. The signals shown in the timing diagram
are therefore the same but with the exception that the two data ports are only 8 bits
wide.
The sequence of events shown in Figure 3–13 is:
1. Initially,
din_ready
is logic '1'. The source driving the input port sets
din_valid
to
logic '1' and puts the blue color value B
m,n
on the
din_data
port.
2. The source holds
din_valid
at logic '1' and the green color value G
m,n
is input.
3. The corresponding red color value R
m,n
is input.
4. The MegaCore function sets
dout_valid
to logic '1' and outputs the blue color
value of the first processed color sample on the
dout_data
port. Simultaneously
the sink connected to the output port sets
dout_ready
to logic '0'. The Avalon
Interface Specifications state that sinks may set ready to logic '0' at any time, for
example because the sink is a FIFO and it has become full.
Table 3–9. Parameters for Example of Data Transferred in Sequence
Parameter Value
Bits per Color Sample 8
Color Pattern
RGB
Figure 3–13. Timing Diagram Showing R’G’B’ Transferred in Sequence
Note to Figure 3–13:
(1) The
startofpacket
and
endofpacket
signals are not shown but are always low during the sequence shown in this figure.
clock
din_ready
din_valid
din_data 7:0
R
m,n
R
G
0,0
G
m,n
B
m,n
B
m+1,n
1.
2.
3.
4.
5. 6.
7.
dout_ready
dout_valid
dout_data 7:0
R
8.
9.
G
1,0
G
m+1,n
G
0,0
G
m,n
B
m,n
m+1,n
m,n