User guide

Table Of Contents
4–6 Chapter 4: 2D FIR Filter MegaCore Function
Control Register Map
Video and Image Processing Suite January 2013 Altera Corporation
User Guide
Control Register Map
Table 46 lists the control register map for the 2D FIR Filter MegaCore function.
The width of each register in the 2D FIR Filter control register map is 32 bits. The
coefficient registers use integer, signed 2’s complement numbers. To convert from
fractional values, simply move the binary point right by the number of fractional bits
specified in the user interface.
The control data is read once at the start of each frame and is buffered inside the
MegaCore function, so the registers can be safely updated during the processing of a
frame.
din_ready
Out
din
port Avalon-ST
ready
signal. This signal indicates when the MegaCore
function is ready to receive data.
din_startofpacket
In
din
port Avalon-ST
startofpacket
signal. This signal marks the start of an
Avalon-ST packet.
din_valid
In
din
port Avalon-ST
valid
signal. This signal identifies the cycles when the port
must input data.
dout_data
Out
dout
port Avalon-ST
data
bus. This bus enables the transfer of pixel data out of
the MegaCore function.
dout_endofpacket
Out
dout
port Avalon-ST
endofpacket
signal. This signal marks the end of an
Avalon-ST packet.
dout_ready
In
dout
port Avalon-ST
ready
signal. The downstream device asserts this signal
when it is able to receive data.
dout_startofpacket
Out
dout
port Avalon-ST
startofpacket
signal. This signal marks the start of an
Avalon-ST packet.
dout_valid
Out
dout
port Avalon-ST
valid
signal. This signal is asserted when the MegaCore
function outputs data.
Table 4–5. 2D FIR Filter Signals (Part 2 of 2)
Signal Direction Description
Table 4–6. 2D FIR Filter Control Register Map
Address Register Name Description
0
Control
Bit 0 of this register is the
Go
bit, all other bits are unused. Setting this bit to 0 causes
the 2D FIR Filter MegaCore function to stop the next time control information is read.
Refer to “Avalon-MM Slave Interfaces” on page 3–17 for full details.
1
Status
Bit 0 of this register is the
Status
bit, all other bits are unused. Refer to “Avalon-MM
Slave Interfaces” on page 3–17 for full details.
2
Coefficient 0
The coefficient at the top left (origin) of the filter kernel.
3
Coefficient 1
The coefficient at the origin across to the right by one.
4
Coefficient 2
The coefficient at the origin across to the right by two.
n
Coefficient
n
The coefficient at position:
Row (where 0 is the top row of the kernel) is the integer value via the truncation of
(n–2) / (filter kernel width)
Column (where 0 is the far left row of the kernel) is the remainder of
(n–2) / (filter kernel width)