User guide

Chapter 6: Alpha Blending MegaCore Function 6–7
Control Register Maps
January 2013 Altera Corporation Video and Image Processing Suite
User Guide
Control Register Maps
Table 6–5 describes the Alpha Blending Mixer MegaCore function control register
map.
The width of each register in the Alpha Blending Mixer control register map is 16 bits.
The control data is read once at the start of each frame and is buffered inside the
MegaCore function, so the registers may be safely updated during the processing of a
frame.
dout_startofpacket Out
dout port Avalon-ST startofpacket signal. This signal marks the start
of an Avalon-ST packet.
dout_valid Out
dout port Avalon-ST valid signal. This signal is asserted when the
MegaCore function outputs data.
Note to Table 6–4:
(1) These ports are present only if you turn on Alpha blending. Note that alpha channel ports are created for layer zero even though no alpha mixing
is possible for layer zero (the background layer). These ports are ignored and can safely be left unconnected or tied to 0.
Table 6–4. Alpha Blending Mixer Signals (Part 2 of 2)
Signal Direction Description
Table 6–5. Alpha Blending Mixer Control Register Map
Address Register(s) Description
0
Control
Bit 0 of this register is the Go bit, all other bits are unused. Setting this bit to 0 causes the Alpha
Blending Mixer MegaCore function to stop the next time control information is read. Refer to
“Avalon-MM Slave Interfaces” on page 3–17 for full details.
1
Status
Bit 0 of this register is the Status bit, all other bits are unused. Refer to “Avalon-MM Slave
Interfaces” on page 3–17 for full details.
2
Layer 1 X Offset in pixels from the left edge of the background layer to the left edge of layer 1.
(1)
3 Layer 1 Y Offset in pixels from the top edge of the background layer to the top edge of layer 1.
(1)
4
Layer 1
Active
Layer 1 is displayed if this control register is set to 1. Data in the input stream is consumed but
not displayed if this control register is set to 2, Avalon-ST packets of type 2 to 14 are still
propagated as usual. Data from the input stream is not pulled out if this control register is set to
0.
(1)
,
(2)
.
5
Layer 2 X ….
(3)
Notes to Table 6–5:
(1) The value of this register is checked at the start of each frame. If the register is changed during the processing of a video frame, the change
does not take effect until the start of the next frame.
(2) For efficiency reasons, the Video and Image Processing Suite MegaCore functions buffer a few samples from the input stream even if they are
not immediately processed. This implies that the Avalon-ST inputs for foreground layers assert ready high and buffer a few samples even if the
corresponding layer has been deactivated.
(3) The rows in the table are repeated in ascending order for each layer from 1 to the foreground layer.