User guide

Table Of Contents
7–2 Chapter 7: Avalon-ST Video Monitor MegaCore Function
Functional Description
Video and Image Processing Suite January 2013 Altera Corporation
User Guide
1 The System Console uses the sopcinfo file written by Qsys to discover the connections
between the trace system and the monitors. If you instantiate and manually connect
the trace system and the monitors using HDL, the System Console will not detect
them.
f For more information on the Trace System, refer to Chapter 25, Trace System
MegaCore Function.
Packet Visualization
The System Console contains a tabular view for displaying the information the
monitors send out. Selecting a row in the trace table allows you to inspect a video
packet in more detail. The following detailed information is available for a packet:
Statistics—Data flow statistics such as backpressure. Refer to Table 71 for more
information on the available statistics.
Data—The sampled values for up to first 6 beats on the Avalon-ST data bus.
[n]
is
the nth beat on the bus.
Video control—Information about Avalon-ST video control packet.
Video data—Packet size, the number of beats of the packet.
Table 71 lists the description of the available statistics.
Table 7–1. Statistics
Statistic Description
Data transfer cycles (beats) The number of cycles transferring data.
Not ready and valid cycles
(backpressure)
The number of cycles between start of packet and end of packet
during which the sink is not ready to receive data but the source
has data to send.
Ready and not valid cycles
(sink waiting)
The number of cycles between start of packet and end of packet
during which the sink is ready to receive data but the source has
no data to send.
Not ready and not valid cycles
The number of cycles between start of packet and end of packet
during which the sink is not ready to receive data and the source
has no data to send.
Inter packet valid cycles
(backpressure)
The number of cycles before start of packet during which the sink
is not ready to receive data but the source has data to send.
Inter packet ready cycles
The number of cycles before start of packet during which the sink
is ready to receive data but the source has no data to send.