Datasheet

ManualsBrandsVISHAY ManualsFETsIRFU120PBF, MOSFET

IRFR120, IRFU120, SiHFR120, SiHFU120

www.vishay.com

Vishay Siliconix

S13-0171-Rev. C, 04-Feb-13

Document Number: 91266

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Power MOSFET

FEATURES

• Dynamic dV/dt Rating

• Repetitive Avalanche Rated

• Surface Mount (IRFR120, SiHFR120)

• Straight Lead (IRFU120, SiHFU120)

• Available in Tape and Reel

• Fast Switching

• Ease of Paralleling

• Material categorization: For definitions of

compliance please see www.vishay.com/doc?99912

DESCRIPTION

Third generation power MOSFETs from Vishay provide the

designer with the best combination of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The DPAK is designed for surface mounting using vapor

phase, infrared, or wave soldering techniques. The straight

lead version (IRFU, SiHFU series) is for through-hole

mounting applications. Power dissipation levels up to 1.5 W

are possible in typical surface mount applications.

Note

a. See device orientation.

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. V

= 25 V, starting T

= 25 °C, L = 5.3 mH, R

= 25 , I

= 7.7 A (see fig. 12).

c. I

 9.2 A, dI/dt  110 A/μs, V

 V

, T

 150 °C.

d. 1.6 mm from case.

e. When mounted on 1" square PCB (FR-4 or G-10 material).

PRODUCT SUMMARY

(V) 100

DS(on)

()V

= 10 V 0.27

(Max.) (nC) 16

(nC) 4.4

(nC) 7.7

Configuration Single

N-Channel MOSFET

DPAK

(TO-252)

IPAK

(TO-251)

ORDERING INFORMATION

Package DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251)

Lead (Pb)-free and Halogen-free SiHFR120-GE3 SiHFR120TR-GE3

SiHFR120TRR-GE3

SiHFR120TRL-GE3

SiHFU120-GE3

Lead (Pb)-free

IRFR120PbF IRFR120TRPbF

IRFR120TRRPbF

IRFR120TRLPbF

IRFU120PbF

SiHFR120-E3 SiHFR120T-E3

SiHFR120TR-E3

SiHFR120TL-E3

SiHFU120-E3

ABSOLUTE MAXIMUM RATINGS (T

= 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

100

Gate-Source Voltage V

± 20

Continuous Drain Current V

at 10 V

= 25 °C

7.7

= 100 °C 4.9

Pulsed Drain Current

Linear Derating Factor 0.33

W/°C

Linear Derating Factor (PCB Mount)

0.020

Single Pulse Avalanche Energy

210 mJ

Repetitive Avalanche Current

7.7 A

Repetitive Avalanche Energy

4.2 mJ

Maximum Power Dissipation T

= 25 °C

Maximum Power Dissipation (PCB Mount)

= 25 °C 2.5

Peak Diode Recovery dV/dtc dV/dt 5.5 V/ns

Operating Junction and Storage Temperature Range T

, T

stg

- 55 to + 150

°C

Soldering Recommendations (Peak Temperature)

for 10 s 260

Summary of content (11 pages)

PAGE 1
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • • • • • • • • 100 RDS(on) () VGS = 10 V 0.27 Qg (Max.) (nC) 16 Qgs (nC) 4.4 Qgd (nC) 7.7 Configuration Single DESCRIPTION D DPAK (TO-252) Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness.
PAGE 2
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL MIN. TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - - 110 Maximum Junction-to-Ambient (PCB Mount)a RthJA - - 50 Maximum Junction-to-Case (Drain) RthJC - - 3.0 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX.
PAGE 3
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 2 - Typical Output Characteristics, TC = 150 °C S13-0171-Rev. C, 04-Feb-13 Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91266 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.
PAGE 4
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S13-0171-Rev. C, 04-Feb-13 Vishay Siliconix Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91266 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE.
PAGE 5
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix RD VDS VGS D.U.T. Rg + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case S13-0171-Rev. C, 04-Feb-13 Document Number: 91266 5 For technical questions, contact: hvm@vishay.
PAGE 6
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T Rg + - I AS V DD VDS 10 V 0.01 Ω tp Fig. 12a - Unclamped Inductive Test Circuit IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig.
PAGE 7
IRFR120, IRFU120, SiHFR120, SiHFU120 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T.
PAGE 8
Package Information www.vishay.com Vishay Siliconix TO-252AA Case Outline E MILLIMETERS A C2 e b2 D1 e1 E1 L gage plane height (0.5 mm) L4 b L5 H D L3 b3 C A1 INCHES DIM. MIN. MAX. MIN. MAX. A 2.18 2.38 0.086 0.094 A1 - 0.127 - 0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 b3 4.95 5.46 0.195 0.215 0.024 C 0.46 0.61 0.018 C2 0.46 0.89 0.018 0.035 D 5.97 6.22 0.235 0.245 D1 4.10 - 0.161 - E 6.35 6.73 0.250 0.265 E1 4.32 - 0.
PAGE 9
Package Information Vishay Siliconix TO-251AA (HIGH VOLTAGE) 4 3 E1 E Thermal PAD 4 b4 θ2 4 A 0.010 0.25 M C A B L2 4 c2 A θ1 B D D1 A C 3 Seating plane 5 C L1 L3 (Datum A) C L B B A A1 3 x b2 View A - A 2xe c 3xb 0.010 0.25 M C A B Plating 5 b1, b3 Base metal Lead tip c1 (c) 5 (b, b2) Section B - B and C - C MILLIMETERS DIM. MIN. MAX. INCHES MIN. MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 2.18 2.39 0.086 0.094 D1 5.21 - 0.205 - A1 0.89 1.
PAGE 10
Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR DPAK (TO-252) 0.224 0.243 0.087 (2.202) 0.090 (2.286) (10.668) 0.420 (6.180) (5.690) 0.180 0.055 (4.572) (1.397) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72594 Revision: 21-Jan-08 www.vishay.
PAGE 11
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