User`s manual

AW00049313000 Camera Functional Description
Basler runner 39
6 Camera Functional
Description
This chapter provides an overview of the camera’s functionality from a system perspective. The
overview will aid your understanding when you read the more detailed information included in the
later chapters of the user’s manual.
6.1 Monochrome Camera Overview
Each camera employs a single line CCD sensor chip designed for monochrome imaging and
provides features such as electronic exposure time control and anti-blooming.
Frame start, line start, and exposure time can be controlled by parameters transmitted to the
camera via the Basler pylon API and the GigE interface.
Frame start and line start can also be controlled via externally generated hardware trigger signals.
These signals facilitate periodic or non-periodic frame/line start. Modes are available that allow the
length of exposure time to be directly controlled by the external line start signal or to be set for a
pre-programmed period of time.
Accumulated charges are read out of the sensor when exposure ends. At readout, accumulated
charges are moved from the sensor’s light-sensitive elements (pixels) to the shift registers (see
Figure 12 on page 40). The charges from the even numbered pixels and the odd numbered pixels
in the array are handled by separate shift registers as shown in the figure. As the charges move out
of the shift registers, they are converted to voltages proportional to the size of each charge. Each
voltage is then amplified by a Variable Gain Control (VGC) and digitized by an Analog-to-Digital
converter (ADC). After each voltage has been amplified and digitized, it passes through an FPGA
and into a frame buffer. All shifting is clocked according to the camera’s internal data rate. Shifting
continues until all image data has been read out of the sensor. As the pixel data passes through the
FPGA and into the buffer, the even/odd data is ordered so that the pixel data for each line will be in
ascending order from pixel 0 through pixel n (where pixel 0 is the first pixel and pixel n is the last
pixel in the line).
The acquired line data accumulates in the frame buffer until a complete frame has been acquired.
The number of line acquisitions that represent a complete frame can be set by the user. There are
parameters available to set the camera to acquire a single frame or to acquire frames continuously.
When a complete frame has been acquired, transmission of the frame to the host PC will begin. The
pixel data leaves the image buffer and passes back through the FPGA to an Ethernet controller
where it is assembled into data packets. The packets are then transmitted via an Ethernet network
to a network adapter in the host PC. The Ethernet controller also handles transmission and receipt
of control data such as changes to the camera’s parameters.