User`s manual

AW00049313000 Camera Functional Description
Basler runner 41
6.2 Color Camera Overview
Each camera employs a tri-linear CCD sensor chip designed for color imaging and provides
features such as electronic exposure time control and anti-blooming. The tri-linear sensor includes
three lines of photosensitive elements (pixels). One line is covered with a red filter, one line with a
green filter, and one line with a blue filter to provide spectral separation.
Frame start, line start, and exposure time can be controlled by parameters transmitted to the
camera via the Basler pylon API and the GigE interface. When a line acquisition is triggered, all
three lines in the sensor are exposed simultaneously and then read out simultaneously.
Frame start and line start can also be controlled via externally generated hardware trigger signals.
These signals facilitate periodic or non-periodic frame/line start. Modes are available that allow the
length of exposure time to be directly controlled by the external line start signal or to be set for a
pre-programmed period of time.
Accumulated charges are read out of the sensor when exposure ends. At readout, accumulated
charges are moved from the pixels in the sensor’s three lines to the shift registers (see Figure 14
on page 42). The charges from each line are handled by separate shift registers as shown in the
figure. As the charges move out of the shift registers, they are converted to voltages proportional to
the size of each charge. Each voltage is then amplified by a Variable Gain Control (VGC) and
digitized by an Analog-to-Digital converter (ADC). After each voltage has been amplified and
digitized, it enters an FPGA. All shifting is clocked according to the camera’s internal data rate.
Shifting continues until all image data has been read out of the sensor. In the FPGA, digitized data
is held in temporary memory (FIFO) so that spatial correction can be performed. Once spatial
correction is complete, the data is passed to a frame buffer.
The acquired line data accumulates in the frame buffer until a complete frame has been acquired.
The number of line acquisitions that represent a complete frame can be set by the user. There are
parameters available to set the camera to acquire a single frame or to acquire frames continuously.
When a complete frame has been acquired, transmission of the frame to the host PC will begin. The
pixel data leaves the frame buffer and passes back through the FPGA to an Ethernet controller
where it is assembled into data packets. The packets are then transmitted via an Ethernet network
to a network adapter in the host PC. The Ethernet controller also handles transmission and receipt
of control data such as changes to the camera’s parameters.
The frame buffer between the sensor and the Ethernet controller allows data to be read out of the
sensor at a rate that is independent of the data transmission rate between the camera and the host
computer. This ensures that the data transmission rate has no influence on image quality.