Specifications

VLSI
Solution
y
VS1053b
VS1053B
4. CHARACTERISTICS & SPECIFICATIONS
4.4 Power Consumption
Tested with an MPEG 1.0 Layer-3 128 kbps sample and generated sine. Output at full volume. Internal
clock multiplier 3.0×. TA=+25
◦
C.
Parameter Min Typ Max Unit
Power Supply Consumption AVDD, Reset 0.6 5.0 µA
Power Supply Consumption CVDD = 1.8V, Reset 12 20.0 µA
Power Supply Consumption AVDD, sine test, 30 Ω + GBUF 30 36.9 60 mA
Power Supply Consumption CVDD = 1.8V, sine test 8 10 15 mA
Power Supply Consumption AVDD, no load 5 mA
Power Supply Consumption AVDD, output load 30 Ω 11 mA
Power Supply Consumption AVDD, 30 Ω + GBUF 11 mA
Power Supply Consumption CVDD = 1.8V 11 mA
4.5 Digital Characteristics
Parameter Min Max Unit
High-Level Input Voltage 0.7×CVDD IOVDD+0.3
1
V
Low-Level Input Voltage -0.2 0.3×CVDD V
High-Level Output Voltage at XTALO = -0.1 mA 0.7×IOVDD V
Low-Level Output Voltage at XTALO = 0.1 mA 0.3×IOVDD V
High-Level Output Voltage at I
O
= -1.0 mA 0.7×IOVDD V
Low-Level Output Voltage at I
O
= 1.0 mA 0.3×IOVDD V
Input Leakage Current -1.0 1.0 µA
SPI Input Clock Frequency
2
CLKI
7
MHz
Rise time of all output pins, load = 50 pF 50 ns
1
Must not exceed 3.6V
2
Value for SCI reads. SCI and SDI writes allow
CLKI
4
.
4.6 Switching Characteristics - Boot Initialization
Parameter Symbol Min Max Unit
XRESET active time 2 XTALI
XRESET inactive to software ready 22000 50000
1
XTALI
Power on reset, rise time to CVDD 10 V/s
1
DREQ rises when initialization is complete. You should not send any data or commands before that.
Version 1.01, 2008-05-22 12