User guide

47
Issued June 20, 2007
M5000 Series: User Guide
PCI6540 PCI-X to PCI-X Bridge
5.6 PCI6540 PCI-X to PCI-X Bridge
More information about the PCI-X to PCI-X Bridge processor has been discussed in “PCI-X to
PCI-X Bridges” on page 32.
Power-up / Reset Configuration Options
PCI-X Capability
• Primary port: XCAP signal is setup at boot-up by the configuration of PCIXCAP, M66EN
signals and configuration switches.
• Secondary port: this PCI segment is setup to run in the 64-bit/33MHz PCI mode.
Secondary Port Arbiter Setup
The PCI6540 internal arbiter is used to arbitrate the PCI bus.
Primary Interface
The primary interface of this bridge is connected to the secondary interface of the Tertiary PCI
Segment PCI6540 bridge and to the second PMC site (PMC#2).
Secondary Interface
The secondary interface of this bridge is connected to the Tundra Universe IID, Mercury PXB++
and mezzanine connector. This interface always runs in the 64-bit/33MHz PCI mode.