User guide

55
Issued June 20, 2007
M5000 Series: User Guide
Functional Description
6.4 Functional Description
System Overview
The Mezzanine PMC Carrier has 3 PMC slots which adds an extra PCI bus to bridge the two
existing busses on the M52xx board. There are two bridges 64bit wide and operate at 33Mhz. These
bridges provide a connection from the M52xx bus to the PMC Carrier bus.
Arbitration on the mezzanine bus
The secondary bridge is responsible as arbiter for the mezzanine bus.
IDSEL generation
PCI buses use a separate address space for initialization, called the Configuration Space. This
address space uses the addressing signal, IDSEL to select the target for all transactions. The
standard way of assigning IDSEL to PCI devices and boards is to connect the IDSEL pin of each
device/board to a unique AD[] bit.
The IDSEL assignments are shown in Table 6-2.
TABLE 6-1. PCI Bus arbiter assignments on Mezzanine bus
REQ/GNT Name
0 PMC slot #3
1 PMC slot #5
2 PMC slot #4
3 Reserved
4 Reserved
5 Reserved
6 Reserved
TABLE 6-2. IDSEL Assignments on MEZZ-x500
PCI Device / BoardIDSELPCI Address
PMC #3 AD[16] 0x00010xxx / 0x00100xxx
PMC #5 AD[21] 0x00200xxx / 0x00400xxx
PMC #4 AD[23] 0x00800xxx / 0x01000xxx