User guide

74
M5000 Series: User Guide
Issued June 20, 2007
PLD Registers
A-1 Miscellaneous PLD Registers
The PLD registers can be accessed by the processor in following address range:
TABLE A-1. PLD Registers
Mnemonic Register Address Access Size
PPC_BOOT PowerPC Boot Options 0x00 R 4 bits
RST_SERIAL Reset and Serial Line Management 0x01 R/W 6 bits
MISC Miscellaneous 0x02 R 4 bits
PCI_CFG PCI Bus Configuration 0x03 R 8 bits
INTERRUPT_A Interrupt Register 0x04 R 8 bits
INTERRUPT_B Interrupt Register 0x05 R 8 bits
INTERRUPT_C Interrupt Register 0x06 R 8 bits
INTERRUPT_D Interrupt Register 0x07 R 8 bits
INTERRUPT_E Interrupt Register 0x08 R 8 bits
INTERRUPT_F Interrupt Register 0x09 R 8 bits
INTERRUPT_G Interrupt Register 0x0A R 8 bits
INTERRUPT_H Interrupt Register 0x0B R 8 bits
INTERRUPT_I Interrupt Register 0x0C R 8 bits
INTERRUPT_J Interrupt Register 0x0D R 8 bits
INTERRUPT_K Interrupt Register 0x0E R 8 bits
INTERRUPT_L Interrupt Register 0x0F R 8 bits
INTERRUPT_M Interrupt Register 0x10 R 8 bits
INTERRUPT_N Interrupt Register 0x11 R 8 bits