User guide

Issued June 20, 2007

M5000 Series: User Guide

VMEbus Slave Images

VMEbus Slave Image 1

The VMEbus Slave Image 1 is set up to map A24 accesses, in the address range 0x100000-

0x3FFFFF, from VMEbus to I/O Cycles on the PCI bus, with PCI addresses starting from

0x02100000.

1) This column shows write data for configuration from PCI

VMEbus Slave Image 2

VMEbus Slave Image 2 is set up to map A32 accesses, in the address range 0x4000.0000-

0x7FFF.FFFF, from VMEbus to Memory Cycles on the PCI bus, with PCI addresses starting from

0x6000.0000. Write posting and read pre fetching is enabled.

1) This column shows write data for configuration from PCI

TABLE B-3. VME Slave image 1 - setup

Write from VME PCI Data 1) Result:

D:0x0000.1000 to A:0x000F18 0x0010.0000 Base Address set to 0x100000

D:0x0000.4000 to A:0x000F1C 0x0040.0000 Bound Address set to 0x400000

D:0x0000.0002 to A:0x000F20 0x0200.0000 Translation Offset set to 0x2000000

D:0x4100.F180 to A:0x000F14 0x80F1.0041 Enable Image, VAS=A24, LAS=I/O

Space,PGM=both, SUPER=both,

LLRMW=enabled, other options disabled.

TABLE B-4. VME Slave image 2 - setup

Write from VME PCI Data 1) Result:

D:0x0000.0040 to A:0x000F2C 0x4000.0000 Base Address set to 0x4000.0000

D:0x0000.0080 to A:0x000F30 0x8000.0000 Bound Address set to 0x8000.0000

D:0x0000.0020 to A:0x000F34 0x2000.0000 Translation Offset set to 0x2000.0000

D:0x0000.F2E0 to A:0x000F28 0xE0F2.0000 Enable Image, VAS=A32, LAS=Mem. Space,

PGM=both, SUPER=both, PWEN&PREN=

enabled, other options disabled.