Instructions

4
.
Panel Operation
50
two channels. This signal is output from the front panel [Sync] connector.
(1) Sync Switch
Enable or disable the sync signal on the [Sync] connector. Press Utility to set CH1
sync/CH2 sync and select “On” or “Off” sync signal output. The default is "on",
which sends the sync signal to the [Sync] connector. The output level on the
[Sync] connector is a logic low when the sync signal is turned off.
(2) Synchronization signal of various waveforms
 For sine, square, ramp and pulse waves, the sync signal is a square wave with a 50%
duty cycle. When the waveform output is positive, the sync signal is TTL high with
respect to the 0V voltage (or DC offset value). When the waveform output is negative,
the sync signal is TTL low relative to the 0V voltage (or DC offset value).
 For an arbitrary waveform, the sync signal is a square wave with a variable duty cycle.
When the output waveform amplitude reaches a certain value, the sync signal is TTL
high.
 For harmonics, the sync signal is referenced to the harmonic order and is a square wave
with a variable duty cycle. When the output waveform amplitude is positive, the sync
signal is TTL high.
 For AM, FM, PM, and PWM, for internal modulation, the sync signal is referenced to
the modulation frequency, and the sync signal is a square wave with a 50% duty cycle.
In the first half of the modulation waveform, the sync signal is TTL high. When external
modulation is performed, there is no sync signal output.
 For ASK, FSK, PSK, BPSK, 3FSK, 4FSK, the synchronization signal is referenced to the
keying frequency, and the synchronization signal is a square wave with a duty cycle of
50%. There is no sync signal output during external modulation.
 For OSK, the sync signal is referenced to the keyed frequency and the sync signal is a
square wave with a 50% duty cycle. When the internal crystal oscillator starts, the sync
signal is TTL high.
 For N-cycle bursts, the sync signal is TTL high at the beginning of the burst. At the end
of the specified number of cycles, the sync signal is TTL low (if the waveform has an
associated start phase, it may not be a zero crossing). For an infinite count pulse train,
the sync signal is the same as the sync signal of the continuous waveform.
 For external gated bursts, the sync signal follows its gate signal. Note: This signal does
not become TTL low until the end of the last cycle (if the waveform has an associated
starting phase, it may not be a zero crossing).
Output Setting
Set the load
For each of the two channels of the front panel, the signal generator has a fixed
series output impedance of 50 Ω. If the actual load impedance is different from the
specified value, the displayed amplitude and offset level will not match the voltage