User manual

Chapter 5 Register Descriptions

VXIbus Interrupt Status Register (VISTR)

VXIbus Configuration Offset: 2A (hex)

Attributes: Read Only 16, 8-bit accessible

15 14 13 12 11 10 9 8

LINT[3] LINT[2] LINT[1] AFINT BKOFF 0 SYSFAIL ACFAIL

76 54 321 0

SFINT IRQ[7] IRQ[6] IRQ[5] IRQ[4] IRQ[3] IRQ[2] IRQ[1]

You can use this register to monitor the VMEbus IRQ[7:1] lines and the status of local

VXI-MXI-2 interrupt conditions. Bits 15 through 8 of this register, along with the logical

address of the VXI-MXI-2 on bits 7 through 0, are returned during an interrupt

acknowledge cycle for the local interrupt condition.

Bit Mnemonic Description

15-13 LINT[3:1] Local Interrupt Level

These bits reflect the state of the LINT[3:1] bits

in the VXIbus Interrupt Control Register

(VICTR).

12 AFINT VMEbus ACFAIL* Interrupt Status

This bit returns 1 when the VXI-MXI-2 is

driving the VMEbus IRQ[7:1] selected by

LINT[3:1] because the ACFAIL* line is

asserted. This bit clears after the VXI-MXI-2

responds to an interrupt acknowledge cycle for

the local interrupt. The ACFAIL* interrupt is

enabled with the AFIE bit in the VXIbus

Interrupt Control Register (VICTR).

11 BKOFF Back Off Status

This bit is set when the VXI-MXI-2 encounters a

deadlock condition between the VXIbus and the

MXIbus. If the BKOFFIE bit in the VXIbus

Interrupt Control Register (VICTR) is set, an

interrupt is also generated. This bit stores the

deadlock status even when the interrupt is not

enabled. This bit clears when read either directly

or through an interrupt acknowledge cycle.