User manual

Chapter 5 Register Descriptions

VXIbus Interrupt Control Register (VICTR)

VXIbus Configuration Offset: 2A (hex)

Attributes: Write Only 16, 8-bit accessible

15 14 13 12 11 10 9 8

LINT[3] LINT[2] LINT[1] 0 BKOFFIE 0 SFIE AFIE

76 54 321 0

0 DIRQ[7] DIRQ[6] DIRQ[5] DIRQ[4] DIRQ[3] DIRQ[2] DIRQ[1]

This register allows the VXI-MXI-2 to assert the VMEbus IRQ[7:1] lines and provides

enable bits for the various VXI-MXI-2 local interrupts.

Bit Mnemonic Description

15-13 LINT[3:1] Local Interrupt Level

These bits determine which VMEbus interrupt

level the local interrupt conditions will assert.

The local interrupt conditions are the BKOFF,

SFINT, and AFINT bits of the VXIbus Interrupt

Status Register (VISTR). Each condition can be

individually enabled in this register. Write a

number in the range 1 through 7 to these bits to

select the desired interrupt level. Writing a 0 to

these bits globally disables the local interrupt.

These bits are cleared by a hard reset and are not

affected by a soft reset.

12 0 Reserved

This bit is reserved. Write a 0 when writing to

this bit.

11 BKOFFIE Back Off Interrupt Enable

Writing a 1 to this bit enables the BKOFF

interrupt condition in the VXIbus Interrupt

Status Register (VISTR) to assert the VMEbus

IRQ[7:1] selected by LINT[3:1]. This bit is

cleared by a hard reset and is not affected by a

soft reset.

10 0 Reserved

This bit is reserved. Write a 0 when writing to

this bit.