User manual

Chapter 5 Register Descriptions
© National Instruments Corporation 5-43 VXI-MXI-2 User Manual
VXIbus Interrupt Acknowledge Register 1 (VIAR1)
VXIbus Configuration Offset: 32 (hex)
Attributes: Read Only 16, 8-bit accessible
15 14 13 12 11 10 9 8
I1[15} I1[14] I1[13] I1[12] I1[11] I1[10] I1[9] I1[8]
76 54 321 0
I1[7] I1[6] I1[5] I1[4] I1[3] I1[2] I1[1] I1[0]
This register generates a VXIbus Interrupt Acknowledge (IACK) cycle for interrupt level
1 when read from the MXIbus and returns the Status ID received from the interrupter. It
can generate 16-bit or 8-bit IACK cycles. Generating an 8-bit IACK cycle requires
reading offset 33 (hex). When read from the VXIbus, this register does not generate an
IACK cycle and returns FFFF (hex).
Bit Mnemonic Description
15-0 I1[15:0] Level 1 Interrupter Status ID
These bits return the Status ID received during
the IACK cycle.