User manual

Chapter 5 Register Descriptions
VXI-MXI-2 User Manual 5-48 © National Instruments Corporation
VXIbus Interrupt Acknowledge Register 6 (VIAR6)
VXIbus Configuration Offset: 3C (hex)
Attributes: Read Only 32, 16, 8-bit accessible
31 30 29 28 27 26 25 24
I6[31] I6[30] I6[29] I6[28] I6[27] I6[26] I6[25] I6[24]
23 22 21 20 19 18 17 16
I6[23] I6[22] I6[21] I6[20] I6[19] I6[18] I6[17] I6[16]
15 14 13 12 11 10 9 8
I6[15] I6[14] I6[13] I6[12] I6[11] I6[10] I6[9] I6[8]
76 54 321 0
I6[7] I6[6] I6[5] I6[4] I6[3] I6[2] I6[1] I6[0]
This register generates a VXIbus Interrupt Acknowledge (IACK) cycle for interrupt level
6 when read from the MXIbus and returns the Status ID received from the interrupter. It
can generate 32-bit, 16-bit, or 8-bit IACK cycles. Generating an 8-bit IACK cycle
requires reading offset 3D (hex). When read from the VXIbus, this register does not
generate an IACK cycle and returns FFFFFFFF (hex).
Bit Mnemonic Description
31-0 I6[31:0] Level 6 Interrupter Status ID
These bits return the Status ID received during
the IACK cycle.