User manual

Chapter 5 Register Descriptions
© National Instruments Corporation 5-49 VXI-MXI-2 User Manual
VXIbus Interrupt Acknowledge Register 7 (VIAR7)
VXIbus Configuration Offset: 3E (hex)
Attributes: Read Only 16, 8-bit accessible
15 14 13 12 11 10 9 8
I7[15] I7[14] I7[13] I7[12] I7[11] I7[10] I7[9] I7[8]
76 54 321 0
I7[7] I7[6] I7[5] I7[4] I7[3] I7[2] I7[1] I7[0]
This register generates a VXIbus Interrupt Acknowledge (IACK) cycle for interrupt level
7 when read from the MXIbus and returns the Status ID received from the interrupter. It
can generate 16-bit or 8-bit IACK cycles. Generating an 8-bit IACK cycle requires
reading offset 3F (hex). When read from the VXIbus, this register does not generate an
IACK cycle and returns FFFF (hex).
Bit Mnemonic Description
15-0 I7[15:0] Level 7 Interrupter Status ID
These bits return the Status ID received during
the IACK cycle.