User manual

Chapter 5 Register Descriptions
VXI-MXI-2 User Manual 5-54 © National Instruments Corporation
6-3 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the DMAICR. The value
these bits return when read is meaningless.
2-0 ILVL[2:0] DMA Interrupt Level
These bits select the VXIbus interrupt level that
the DMA interrupt condition will assert. Write a
7 to these bits for IRQ7*, write a 6 for IRQ6*,
and so on. These bits must be initialized to a
value between 7 and 1 for the DMA interrupt to
operate properly. These bits are cleared on a hard
reset and are not affected by a soft reset.