User manual

Chapter 5 Register Descriptions
© National Instruments Corporation 5-69 VXI-MXI-2 User Manual
29-26 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the CHCRx. The value
these bits return when read is meaningless.
25 SET DONEIE Set DONE Interrupt Enable
Writing a 1 to this bit enables the corresponding
DMA controller to interrupt on the DONE
condition in the DMA Channel Status Register
(CHSRx). Writing a 0 to this bit has no effect.
This bit returns a 1 when read if the
corresponding DMA controller is enabled to
interrupt on the DONE condition and a 0 if it is
disabled. The interrupt is disabled by a hard reset
and is not affected by a soft reset.
24 CLR DONEIE Clear DONE Interrupt Enable
Writing a 1 to this bit disables the corresponding
DMA controller from interrupting on the DONE
condition in the DMA Channel Status Register
(CHSRx). Writing a 0 to this bit has no effect.
This bit returns a 0 when read if the
corresponding DMA controller is enabled to
interrupt on the DONE condition and a 1 if it is
disabled. The interrupt is disabled by a hard reset
and is not affected by a soft reset.
23-15 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the CHCRx. The value
these bits return when read is meaningless.
14 1 Reserved
This bit is reserved. It must be initialized to 1 for
the DMA controller to operate properly. This bit
is cleared on a hard reset and is not affected by a
soft reset.
13-0 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the CHCRx. The value
these bits return when read is meaningless.