User manual

Chapter 5 Register Descriptions
VXI-MXI-2 User Manual 5-72 © National Instruments Corporation
DMA Source Configuration Register (SCRx)
SCR1 VXIbus A24 or A32 Offset: D0C (hex)
SCR2 VXIbus A24 or A32 Offset: E0C (hex)
Attributes: Read/Write 32, 16, 8-bit accessible
31 30 29 28 27 26 25 24
00 00 000 0
23 22 21 20 19 18 17 16
11 10 000 0
15 14 13 12 11 10 9 8
0 BLOCKEN 0 0 0 ASCEND TSIZE[1] TSIZE[0]
76 54 321 0
PORT[1] PORT[0] AM[5] AM[4] AM[3] AM[2] AM[1] AM[0]
This register is used to configure how the DMA controller will access the source of the
data.
Bit Mnemonic Description
31-24 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the SCRx. The value these
bits return when read is meaningless.
23-21 1 Reserved
These bits are reserved. They must be initialized
to 111 (binary) for the DMA controller to
operate properly. These bits are cleared on a hard
reset and are not affected by a soft reset.
20-15 0 Reserved
These bits are reserved. Write each of these bits
with 0 when writing the SCRx. The value these
bits return when read is meaningless.