User manual

Chapter 5 Register Descriptions
© National Instruments Corporation 5-83 VXI-MXI-2 User Manual
(ERROR, SABORT, STOPS, XFERR,
SERR[1:0], and DERR[1:0]) should be checked
before assuming the transfer completed
successfully.
24-16 0 Reserved
These bits are reserved. The value these bits
return when read is meaningless.
15 ERROR DMA Error bit
When this bit returns a 1 it indicates that the
corresponding DMA controller terminated an
operation due to an error condition. The other
bits in this register can be used to determine the
type of error.
14 SABORT DMA Software Abort bit
When this bit returns a 1, it indicates that the
corresponding DMA controller terminated an
operation because the ABORT bit in the DMA
Channel Operation Register (CHORx) was
written with a 1.
13 0 Reserved
This bit is reserved. The value this bit returns
when read is meaningless.
12 STOPS DMA Stopped Status bit
When this bit returns a 1, it indicates that the
STOP bit in the DMA Channel Operation
Register (CHORx) was written with a 1. This
does not indicate that the DMA controller has
actually stopped. The DONE bit indicates when
the DMA controller has actually stopped the
operation.
11-10 0 Reserved
These bits are reserved. The value these bits
return when read is meaningless.
9 XFERR Transfer Error
When this bit returns a 1, it indicates that the
DMA operation has terminated because either
the source or destination encountered an error
condition. Refer to the SERR[1:0] and
DERR[1:0] bit descriptions to determine the type
of error.