User manual

Chapter 5 Register Descriptions
© National Instruments Corporation 5-85 VXI-MXI-2 User Manual
DMA FIFO Count Register (FCRx)
FCR1 VXIbus A24 or A32 Offset: D40 (hex)
FCR2 VXIbus A24 or A32 Offset: E40 (hex)
Attributes: Read Only 32, 16, 8-bit accessible
31 30 29 28 27 26 25 24
00 00 000 0
23 22 21 20 19 18 17 16
ECR[7] ECR[6] ECR[5] ECR[4] ECR[3] ECR[2] ECR[1] ECR[0]
15 14 13 12 11 10 9 8
00 00 000 0
76 54 321 0
FCR[7] FCR[6] FCR[5] FCR[4] FCR[3] FCR[2] FCR[1] FCR[0]
This register indicates the state of the DMA controller’s FIFO buffer.
Bit Mnemonic Description
31-24 0 Reserved
These bits are reserved. The value these bits
return when read is meaningless.
23-16 ECR[7:0] Empty Count Register
These bits indicate the number of empty
locations (in bytes) currently in the FIFO.
15-8 0 Reserved
These bits are reserved. The value these bits
return when read is meaningless.
7-0 FCR[7:0] Full Count Register
These bits indicate the number of bytes of data
remaining in the FIFO.