User manual

System Configuration

Chapter

This chapter explains important considerations for programming and

configuring a VXIbus/MXIbus system using VXI-MXI-2 mainframe

extenders.

Note: Detailed descriptions of all register bits can be found in Chapter 5, Register

Descriptions.

In a MXIbus system, MXIbus address space is partitioned between

MXIbus devices. A MXIbus device is any device having a MXIbus

interface. MXIbus devices can be VXIbus mainframes, PCs, or

stand-alone instruments. The MXIbus memory map is the same for all

devices in the VXIbus/MXIbus system. Multiple VXIbus subsystems

share one VXIbus/MXIbus Resource Manager (RM). This multiframe

RM performs all the VXIbus RM functions and configures all

VXI-MXI-2 mainframe extenders in the system to partition the

MXIbus address space.

You can connect a VXIbus/MXIbus system together to form any

arbitrary tree topology. A tree topology has no circular paths. Figures

6-1 and 6-2 show examples of tree topologies. The system in Figure 6-1

would not be a tree structure if a cable were added from the last MXIbus

device on Level 1 to the Root PC. Figure 6-2 would also be an illegal

and circular system if a cable were added to connect the two MXIbus

devices on Level 1. At the root of the tree is the multiframe RM. The

root can be a VXIbus mainframe or a stand-alone device, such as a PC

with a MXIbus interface, that can operate as the system RM.

All MXIbus devices have address windows that connect them to the

MXIbus system address map. MXIbus devices can be assigned space in

any of four address spaces: A32, A24, A16, and logical address space.

Upon initialization, all windows are turned off, isolating all MXIbus

devices from each other. The multiframe RM scans the MXIbus links

and VXIbus mainframes for devices and configures the window

registers on each MXIbus device in order to partition the MXIbus

address space among all devices.