User manual

Chapter 1 Introduction
VXI-MXI-2 User Manual 1-4 © National Instruments Corporation
Can extend VMEbus interrupt levels, utility signals, VXIbus TTL
triggers, and CLK10 to MXIbus
Can source or sense VXIbus TTL and P2 ECL trigger lines
Supports dynamic configuration of VXIbus devices
Can operate in either one of two modes: parallel or interlocked
Allows for optional or user-installable onboard DRAM up to
64 MB, which can be shared with the VXIbus and MXIbus
Conforms to VXI-6, the VXIbus Mainframe Extender Specification
Conforms to the MXI-2 specification
Supports automatic Slot 0 detection
Supports automatic MXIbus System Controller detection
Supports automatic MXIbus termination
Has no restrictions on Commander/Servant hierarchy or physical
location of devices
The VXI-MXI-2 generates all the support signals required by the
VXIbus:
VMEbus System Controller functions:
16 MHz system clock driver
Data transfer bus arbiter (PRI or RR ARBITER)
Interrupt acknowledge daisy-chain driver
VMEbus miscellaneous services:
VMEbus timeout (BTO)
Pushbutton system reset switch
VMEbus master capabilities:
Access to A16, A24, and A32 address space
D08(EO), D16, D32, and D64 accesses
Release-on-Request bus requester (programmable bus
request level)
Optional FAIR VXIbus requester
VMEbus slave capabilities:
A16, A24, and A32 address space
D08(EO), D16, D32, and D64 accesses
VMEbus Interrupter
ROAK or RORA (programmable)